Packages for integrated circuits and methods of packaging integrated circuits

US9786838B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9786838-B2
Application numberUS-201615290849-A
CountryUS
Kind codeB2
Filing dateOct 11, 2016
Priority dateOct 13, 2015
Publication dateOct 10, 2017
Grant dateOct 10, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit package including an integrated circuit die including a first side and a second side opposite the first side, the first side including at least one magnetoresistive device formed thereon. The integrated circuit package also may include a first magnetic shield disposed on or adjacent the first side of the integrated circuit die, wherein the first magnetic shield is formed of a composite material.

First claim

Opening claim text (preview).

I claim: 1. An integrated circuit package, comprising: an integrated circuit die including a first side and a second side opposite the first side, the first side including at least one magnetoresistive device formed thereon; a first magnetic shield disposed on or adjacent the first side of the integrated circuit die, wherein the first magnetic shield is formed of a composite material; and a second magnetic shield disposed on or adjacent the second side of the integrated circuit die, wherein the first magnetic shield includes at least one material different from the second magnetic shield. 2. The integrated circuit package of claim 1 , wherein the composite material includes a plurality of ferromagnetic filler elements dispersed in an electrically nonconductive molding medium. 3. The integrated circuit package of claim 1 , wherein the composite material includes a plurality of filler elements dispersed in an electrically nonconductive molding medium, and wherein each filler element of the plurality of filler elements includes nickel. 4. The integrated circuit package of claim 1 , wherein the composite material includes a plurality of filler elements dispersed in an electrically nonconductive molding medium, and wherein each filler element of the plurality of filler elements includes an alloy of nickel and iron. 5. The integrated circuit package of claim 1 , wherein the composite material includes a plurality of filler elements dispersed in an electrically nonconductive molding medium, wherein each filler element of the plurality of filler elements includes an alloy of nickel and iron, and wherein the alloy includes approximately 80% nickel. 6. The integrated circuit package of claim 1 , wherein the second magnetic shield is made of metal. 7. The integrated circuit package of claim 1 , wherein the first magnetic shield and the second magnetic shield are in electrical contact. 8. The integrated circuit package of claim 1 , wherein the first magnetic shield encapsulates at least the first side of the integrated circuit die. 9. The integrated circuit package of claim 1 , further including a substrate positioned adjacent the second side of the integrated circuit die, and wherein the second magnetic shield is disposed between the substrate and the integrated circuit die. 10. The integrated circuit package of claim 1 , wherein the second magnetic shield is separated from the first magnetic shield by an electrically insulating spacer. 11. The integrated circuit package of claim 1 , wherein an electrically insulating spacer is disposed between the first and second magnetic shields, and wherein the electrically insulating spacer includes at least one through opening. 12. The integrated circuit package of claim 1 , wherein the integrated circuit die is disposed within an isolating cavity, and wherein the first magnetic shield surrounds the isolating cavity. 13. An integrated circuit package, comprising: an integrated circuit die including a first side and a second side opposite the first side, the first side including at least one magnetoresistive device formed thereon; a first magnetic shield disposed on or adjacent the first side of the integrated circuit die; and a second magnetic shield disposed on or adjacent the second side of the integrated circuit die, wherein the first magnetic shield includes a composite material having a plurality of ferromagnetic filler elements dispersed in an electrically nonconductive molding medium, and wherein the first magnetic shield includes at least one material different from the second magnetic shield. 14. The integrated circuit package of claim 13 , wherein each filler element of the plurality of filler elements includes nickel. 15. The integrated circuit package of claim 13 , wherein each filler element of the plurality of filler elements includes an alloy of nickel and iron. 16. The integrated circuit package of claim 13 , wherein each filler element of the plurality of filler elements includes an alloy of nickel and iron, and wherein the alloy includes approximately 80% nickel. 17. The integrated circuit package of claim 13 , wherein the first magnetic shield and the second magnetic shield are in electrical contact. 18. The integrated circuit package of claim 13 , further including a substrate positioned adjacent the second side of the integrated circuit die, and wherein the second magnetic shield is disposed between the substrate and the integrated circuit die. 19. The integrated circuit package of claim 13 , wherein the first magnetic shield is electrically insulated from the second magnetic shield. 20. The integrated circuit package of claim 13 , wherein the first magnetic shield is separated from the second magnetic shield by an electrically insulating spacer. 21. The integrated circuit package of claim 13 , wherein the first magnetic shield is separated from the second magnetic shield by an electrically insulating spacer, and wherein the electrically insulating spacer includes at least one through opening. 22. The integrated circuit package of claim 13 , wherein the integrated circuit die is disposed within an isolating cavity, and wherein the first magnetic shield surrounds the isolating cavity. 23. An integrated circuit package, comprising: an integrated circuit die including a first side and a second side opposite the first side, the first side including at least one magnetoresistive device formed thereon; a substrate positioned adjacent the second side of the integrated circuit die; a first magnetic shield disposed on or adjacent the first side of the integrated circuit die, wherein the first magnetic shield is formed of a composite material; and a second magnetic shield disposed on or adjacent the second side of the integrated circuit die, wherein the second magnetic shield is different from the first magnetic shield, and wherein the second magnetic shield is disposed between the substrate and the integrated circuit die. 24. The integrated circuit package of claim 23 , wherein the composite material includes a plurality of filler elements dispersed in an electrically nonconductive molding medium. 25. The integrated circuit package of claim 23 , wherein the first magnetic shield encapsulates at least the first side of the integrated circuit die.

Assignees

Inventors

Classifications

  • materials for magnetic shielding, e.g. ferromagnetic materials · CPC title

  • shielding resins · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

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What does patent US9786838B2 cover?
An integrated circuit package including an integrated circuit die including a first side and a second side opposite the first side, the first side including at least one magnetoresistive device formed thereon. The integrated circuit package also may include a first magnetic shield disposed on or adjacent the first side of the integrated circuit die, wherein the first magnetic shield is formed o…
Who is the assignee on this patent?
Everspin Technologies Inc
What technology area does this patent fall under?
Primary CPC classification H10W42/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).