Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9786806-B2
Application number	US-201415106996-A
Country	US
Kind code	B2
Filing date	Dec 22, 2014
Priority date	Dec 25, 2013
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

A semiconductor device includes a silicon substrate and a detection element and p-type and n-type MOS transistors, which are arranged on the silicon substrate, wherein the detection element includes a semiconductor layer, electrodes, and a Schottkey barrier disposed therebetween, the semiconductor layer is arranged just above a layer having the same composition and height as those of an impurity diffusion layer in the source or drain of the p-type or n-type MOS transistor, a region, in the silicon substrate, having the same composition and height as those of a channel region, in the silicon substrate, just below a gate oxide film of the p-type MOS transistor or the n-type MOS transistor, or a region, in the silicon substrate, having the same composition and height as those of a region just below a field oxide film disposed between the p-type and the n-type MOS transistor.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a silicon substrate; and
a Schottkey barrier element, a p-type MOS transistor, and an n-type MOS transistor which are arranged in an in-plane direction on the silicon substrate,
wherein the Schottkey barrier element includes a semiconductor layer and electrodes, and the semiconductor layer and the electrodes are in contact with each other to form the Schottkey barrier element,
the semiconductor layer is arranged
(i) just above a layer having the same chemical composition as those of an impurity diffusion layer in the source or drain of the p-type MOS transistor,
(ii) just above a layer having the same chemical composition as those of an impurity diffusion layer in the source or drain of the n-type MOS transistor,
(iii) just above a region, in the silicon substrate, having the same chemical composition as those of a channel region, in the silicon substrate, just below a gate oxide film of the p-type MOS transistor or the n-type MOS transistor, or
(iv) just above a region, in the silicon substrate, having the same chemical composition as those of a region, in the silicon substrate, just below a field oxide film disposed between the p-type MOS transistor and the n-type MOS transistor.

2. The semiconductor device according to claim 1 , wherein the semiconductor layer is an epitaxial layer.

3. The semiconductor device according to claim 1 , wherein the field oxide film is arranged between the Schottkey barrier element and the p-type MOS transistor or the n-type MOS transistor.

4. The semiconductor device according to claim 1 , wherein the height of the Schottkey barrier is 0.4 eV or less.

5. The semiconductor device according to claim 1 , wherein the height of the Schottkey barrier is 0.1 eV or more and 0.3 eV or less.

6. The semiconductor device according to claim 1 , wherein the semiconductor layer has a lattice constant of 5.430 angstroms or more and 5.653 angstroms or less.

7. The semiconductor device according to claim 1 , wherein the Schottkey barrier element includes a Schottkey barrier diode or MOSFET.

8. The semiconductor device according to claim 1 , wherein the semiconductor layer includes a semiconductor having a conductivity type opposite to the conductivity type of the impurity diffusion layer.

9. The semiconductor device according to claim 1 , wherein the semiconductor layer includes a semiconductor having a conductivity type opposite to the conductivity type of the silicon substrate.

10. An image forming apparatus to form an image of a specimen, comprising:
an irradiation device to perform illumination of electromagnetic waves to the specimen; and
an imaging element to detect electromagnetic waves from the specimen,
wherein the imaging element includes the semiconductor device according to claim 1 .

11. The semiconductor device according to claim 1 , wherein the semiconductor layer is arranged
(i) just above a layer having the same chemical composition and height as those of an impurity diffusion layer in the source or drain of the p-type MOS transistor,
(ii) just above a layer having the same chemical composition and height as those of an impurity diffusion layer in the source or drain of the n-type MOS transistor,
(iii) just above a region, in the silicon substrate, having the same chemical composition and height as those of a channel region, in the silicon substrate, just below a gate oxide film of the p-type MOS transistor or the n-type MOS transistor, or
(iv) just above a region, in the silicon substrate, having the same chemical composition and height as those of a region, in the silicon substrate, just below a field oxide film disposed between the p-type MOS transistor and the n-type MOS transistor.

12. A method for manufacturing a semiconductor device including a Schottkey barrier element, a p-type MOS transistor, and an n-type MOS transistor on a silicon substrate, the method comprising the steps of:
a first process of forming the n-type MOS transistor, the p-type MOS transistor, and the Schottky barrier element, on the silicon substrate;
a second process of connecting metal wiring to each of the n-type MOS transistor, the p-type MOS transistor, and the Schottky barrier element formed in the first process,
wherein, in the first process, an element formation process of forming the Schottky barrier element is performed, after performing a process including at least a first step of forming a gate oxide film on the silicon substrate, a second step of forming a field oxide film on the silicon substrate to separate elements, and a third step of forming an impurity diffusion layer, and
wherein the element formation process includes
an exposing step to expose the impurity diffusion layer formed in the third step, a region just below the gate oxide film formed in the first step, or a region just below the field oxide film formed in the second step,
a growing step to epitaxially grow a semiconductor layer just above the impurity diffusion layer, the region just below the gate oxide film, or the region just below the field oxide film, which is exposed in the exposing step, and
an electrode forming step to form an electrodes on the surface of the semiconductor layer to form the semiconductor layer and the Schottky barrier element.

13. The manufacturing method according to claim 12 , wherein the impurity diffusion layer provided with the semiconductor layer is formed at the same time with the impurity diffusion layer in the source or drain of the p-type MOS transistor or the impurity diffusion layer in the source or drain of the n-type MOS transistor.

14. The manufacturing method according to claim 12 , wherein the region, which is provided with the semiconductor layer and which is just below the gate oxide film, is formed in the same step as the step of a channel region, in the substrate, just below the gate oxide film of the p-type MOS transistor or the n-type MOS transistor.

15. The manufacturing method according to claim 12 , wherein the region, which is provided with the semiconductor layer and which is just below the field oxide film, is a region, from which an oxide film formed at the same time with the field oxide film formed between the p-type MOS transistor and the n-type MOS transistor has been removed.

16. The manufacturing method according to claim 12 , wherein in the growing step, the semiconductor layer is epitaxially grown by using a chemical vapor deposition method, a metal-organic vapor phase epitaxy method, or a molecular beam epitaxy method.

Assignees

• Canon Kk

Inventors

• Sekiguchi Ryota
• Ouchi Toshihiko

Classifications

• H01L31/1804

  Electricity · mapped topic

• Y02P70/521

  Cross-Sectional Technologies · mapped topic

• H01L31/1085

  Electricity · mapped topic

• H01L29/66143

  Electricity · mapped topic

• H01L27/14689

  Electricity · mapped topic