Compensation for threshold voltage variation of memory cell components

Patent metadata

Field	Value
Publication number	US-9786345-B1
Application number	US-201615267807-A
Country	US
Kind code	B1
Filing date	Sep 16, 2016
Priority date	Sep 16, 2016
Publication date	Oct 10, 2017
Grant date	Oct 10, 2017

Abstract

Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Before reading a memory cell, the voltage on an access line of the memory cell may be initialized to a value associated with the threshold voltage of a switching component in electronic communication with the memory cell. The voltage may be initialized by reducing the existing voltage on the access line to the value. The switching component or an additional pull down device, or both, may be used to reduce the voltage of the access line. After the access line has been initialized to the value, the read operation may be triggered.

First claim

What is claimed is:

1. A method, comprising:
identifying a ferroelectric memory cell for a read operation, wherein an access line of the ferroelectric memory cell is in electronic communication with a sense component via a switching component;
reducing a voltage of the access line to a value that is based at least in part on a threshold voltage of the switching component, wherein the voltage of the access line is reduced based at least in part on identifying the ferroelectric memory cell for the read operation;
activating the switching component after the voltage of the access line reaches the value;
performing the read operation at the sense component of the ferroelectric memory cell after the switching component is activated; and
isolating the ferroelectric memory cell from the access line before reducing the voltage of the access line.

2. The method of claim 1 , wherein reducing the voltage of the access line comprises:
activating an additional switching component coupled between the access line and a voltage source for a predetermined period of time.

3. The method of claim 1 , wherein reducing the voltage of the access line comprises:
establishing a conductive path between the switching component and a voltage source; and
the method further comprising activating the switching component for a period of time while the conductive path is established.

4. The method of claim 1 , wherein isolating the ferroelectric memory cell from the access line comprises:
deactivating a selection component of the ferroelectric memory cell.

5. A method, comprising:
identifying a ferroelectric memory cell for a read operation, wherein an access line of the ferroelectric memory cell is in electronic communication with a sense component via a switching component;
reducing a voltage of the access line to a value that is based at least in part on a threshold voltage of the switching component, wherein the voltage of the access line is reduced based at least in part on identifying the ferroelectric memory cell for the read operation;
activating the switching component after the voltage of the access line reaches the value and while a conductive path is established between the switching component and a second voltage source; and
performing the read operation at the sense component of the ferroelectric memory cell after the switching component is activated;
wherein reducing the voltage of the access line comprises: activating an additional switching component coupled with the access line and a first voltage source.

6. A method, comprising:
identifying a ferroelectric memory cell for a read operation, wherein a selection component of the ferroelectric memory cell is in electronic communication with an integrator via a first access line;
reducing a voltage of the first access line to a value that is based at least in part on a threshold voltage of the integrator, wherein the voltage of the first access line is reduced based at least in part on identifying the ferroelectric memory cell for the read operation;
applying a voltage to a second access line of the ferroelectric memory cell after the voltage of the first access line reaches the value, wherein application of the voltage activates the selection component; and
activating the integrator for the read operation after the selection component is activated.

7. The method of claim 6 , wherein reducing the voltage of the first access line comprises:
establishing a conductive path between the first access line and a voltage source via activation of a switching component.

8. The method of claim 6 , wherein reducing the voltage of the first access line comprises:
establishing a conductive path between the first access line and a voltage source via activation of the integrator.

9. The method of claim 6 , wherein reducing the voltage of the first access line comprises:
establishing a conductive path between the first access line and a first voltage source via activation of a switching component; and
the method further comprising establishing a conductive path between the first access line and a second voltage source via activation of the integrator.

10. The method of claim 6 , wherein activating the selection component establishes a conductive path between the ferroelectric memory cell and a sense capacitor and applying the voltage to the second access line transfers charge from the ferroelectric memory cell to the sense capacitor.

11. The method of claim 10 , wherein activating the integrator transfers current from the sense capacitor.

12. The method of claim 10 , further comprising:
determining that the first access line has reached a threshold value; and
deactivating the integrator based at least in part on the determination.

13. The method of claim 12 , further comprising:
determining a period of time the integrator is active; and
determining a stored state of the ferroelectric memory cell based at least in part on a duration of the period of time.

14. A method, comprising:
identifying a ferroelectric memory cell for a read operation, wherein the ferroelectric memory cell is in electronic communication with a switching component via a first access line;
reducing a voltage of the first access line to a value that is based at least in part on a threshold voltage of the switching component, wherein the voltage of the first access line is reduced based at least in part on identifying the ferroelectric memory cell for the read operation;
applying a voltage to a second access line of the ferroelectric memory cell after the voltage of the first access line reaches the value; and
performing the read operation of the ferroelectric memory cell after applying to voltage to the second access line.

15. The method of claim 14 , wherein reducing the voltage comprises:
establishing a conductive path between the first access line and a voltage source.

16. The method of claim 15 , wherein establishing the conductive path comprises:
activating an additional switching component coupled with the first access line and the voltage source.

17. The method of claim 15 , wherein establishing the conductive path comprises:
activating the switching component coupled with the first access line and the voltage source.

18. The method of claim 14 , wherein performing the read operation comprises:
applying a voltage to the ferroelectric memory cell, wherein the applied voltage transfers charge from the ferroelectric memory cell to a sense capacitor in electronic communication with a sensing circuit.

19. An electronic memory apparatus, comprising:
a ferroelectric memory cell;
a first access line and a second access line, wherein the ferroelectric memory cell is in electronic communication with a switching component via the first access line; and
a controller in electronic communication with the ferroelectric memory cell and the switching component, wherein the controller is operable to:
identify the ferroelectric memory cell for a read operation;
reduce a voltage of the first access line to a value that is based at least in part on a threshold voltage of the switching component, wherein the voltage of the first access line is reduced based at least in part on identifying the ferroelectric memory cell for the read operation;
trigger a read operation of the ferroelectric memory cell after reducing the voltage of the first access line; and

apply a voltage to the second access line to activate a selection component of the ferroelectric memory cell.

20. The electronic

Assignees

• Micron Technology Inc

Inventors

• Thiruvengadam Aswin
• Castro Hernan A

Classifications

• G11C11/221 Primary

  using ferroelectric capacitors · CPC title

• G11C11/2255

  Bit-line or column circuits · CPC title

• G11C11/2273

  Reading or sensing circuits or methods · CPC title

• G11C11/2259

  Cell access · CPC title

• G11C11/2297

  Power supply circuits · CPC title