System and method for mitigating oxide growth in a gate dielectric

Patent metadata

Field	Value
Publication number	US-9779946-B2
Application number	US-201715404561-A
Country	US
Kind code	B2
Filing date	Jan 12, 2017
Priority date	May 13, 2003
Publication date	Oct 3, 2017
Grant date	Oct 3, 2017

Abstract

Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.

First claim

What is claimed is:

1. A method for forming a device structure on a substrate, comprising:
forming a dielectric layer on the substrate;
introducing nitrogen atoms in the dielectric layer contained mostly to a top region of the dielectric layer using a plasma process in a first process chamber of the processing system, the first process chamber having a first pumping element configured to evacuate gas from the first process chamber;
transferring the substrate between the first process chamber and a second process chamber through a transfer chamber of the processing system, wherein the transfer chamber is connected to the first process chamber via a first vacuum lock door and connected to the second process chamber via a second vacuum lock door, the transfer chamber having a gas distribution system and a second, distinct pumping element that provides an ambient of inert gas flow within the transfer chamber, wherein during the transferring, the gas distribution system and the second pumping element maintain a pressure of about 3 Torr to about 20 Torr in the transfer chamber while actively purging the transfer chamber;
performing a thermal process in the second process chamber; and
introducing and removing the substrate to the processing system through a load lock distinct from said transfer chamber.

2. The method of claim 1 , wherein the nitrogen atoms are introduced into the dielectric layer by flowing N 2 in the first process chamber and the plasma process having a power of about 2 W to about 3000 W and a pressure of about 5 mTorr to about 50 T.

3. The method of claim 2 , wherein the gas distribution system and the second pumping element actively purge the transfer chamber using an inert gas.

4. The method of claim 3 , wherein the inert gas used for actively purging includes at least one of N 2 , He, Ne, Ar, Kr, and Xe.

5. The method of claim 2 , wherein the transferring enclosure is being actively purged at a flow rate of about 2 liters per minute to about 7 liters per minute.

6. The method of claim 1 , wherein the step of performing the thermal process comprises a temperature of about 400° C. to about 1200° C.

7. The method of claim 1 , wherein the step of performing the thermal process comprises oxygen containing species and a temperature of about 400° C. to about 1200° C.

8. The method of claim 1 , further comprising forming a polysilicon layer over the dielectric layer in a third process chamber connected to the transfer chamber.

9. A method for forming device structure on a substrate, comprising:
introducing the substrate to a processing system by transferring the substrate through a load lock to a distinct transfer chamber, the transfer chamber having a gas distribution system in fluid communication with the transfer chamber and a first pumping element connected to the transfer chamber;
maintaining the transfer chamber at a pressure of about 3 Torr to about 20 Torr while actively purging the transfer chamber with an inert gas at a predetermined flow rate using the gas distribution system and the first pumping element;
transferring the substrate from the transfer chamber to a first process chamber having a distinct, second pumping element;
introducing nitrogen atoms contained mostly to a top region of a dielectric layer on the substrate in the first process chamber using a plasma process;
transferring the substrate from the first process chamber to a second process chamber through the transfer chamber, the second process chamber having a distinct third pumping element; and
performing a thermal process in the second process chamber.

10. The method of claim 9 , further comprising the steps of:
transferring the substrate from the second process chamber to a third process chamber through the transfer chamber while maintaining the transfer chamber at the pressure of about 3 Torr to about 200 Torr and actively purging the transfer chamber; and
forming a polysilicon layer over the dielectric layer in the third process chamber.

11. The method of claim 9 , wherein the thermal process uses O 2 , N 2 O, or NO.

12. The method of claim 9 , wherein the step of introducing nitrogen atoms uses N 2 and He.

13. A transistor device comprising:
source and drain regions formed in a semiconductor substrate and separated by a first region;
a gate dielectric layer formed adjacent the first region;
the gate dielectric layer comprising nitrogen contained mostly to a top region of the gate dielectric layer,
the gate dielectric layer is formed in a process comprising the steps of:
forming a first dielectric layer over the semiconductor substrate;
moving the first dielectric layer into a transferring enclosure following the forming step, the transferring enclosure being actively purged with an inert gas at a pressure of about 3 Torr to about 20 Torr;
introducing nitrogen atoms into mostly the top region of the first dielectric layer in a first chamber attached to the transferring enclosure using a plasma process, the introduction of nitrogen atoms causing damage to the first dielectric;
repairing the damage by subjecting the first dielectric layer to a thermal process in a second chamber attached to the transferring enclosure; and

a conductive layer adjacent the top region of the gate dielectric layer.

14. The transistor device of claim 13 , in which the transferring enclosure is being actively purged at a flow rate of about 2 liters per minute to about 7 liters per minute.

15. The transistor device of claim 13 , in which the inert gas used for actively purging includes at least one of N 2 , He, Ne, At, Kr, and Xe.

16. The transistor device of claim 13 , further comprising maintaining the substrate in a load lock enclosure attached to the transferring enclosure prior to the moving step.

17. The transistor device of claim 13 , further comprising moving the substrate into the transferring enclosure following the repairing step.

18. The transistor device of claim 13 , wherein the nitrogen atoms are introduced into the top region of the first dielectric layer by flowing N 2 in the first chamber and the plasma process having a power of about 2 W to about 3000 W and a pressure of about 5 mTorr to about 50 T.

19. A transistor device comprising:
source and drain regions formed in a semiconductor substrate and separated by a first region;
a gate dielectric formed adjacent the first region;
the gate dielectric comprising a near surface region comprising nitrogen at a concentration of greater than 5 atomic percent, wherein the near surface region is formed in a process comprising the steps of:
forming a first dielectric layer on the semiconductor substrate;
forming the near surface region in the first dielectric layer by introducing nitrogen atoms in the near surface region of the gate dielectric layer using a plasma process in a first process chamber of a processing system, the first process chamber having a first pumping element configured to evacuate gas from the first process chamber;
performing a thermal process in a second process chamber;
transferring the semiconductor substrate between the first process chamber and the second process chamber through a transfer chamber of the processing system, wherein the transfer chamber is connected to the first process chamber via a first vacuum lock door and connected to the second process chamber via a second vacuum lock door, the transfer chamber having a gas distribution system and a second, distinct pumping element that actively purge the transfer chamber while maintaining a pressure

Assignees

• Texas Instruments Inc

Inventors

• Bevan Malcolm J
• Bu Haowen
• Niimi Hiroaki
• Alshareef Husam N

Classifications

• H10P14/69392

  the material containing hafnium, e.g. HfO2 · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

• H10P14/6322

  Formation by thermal treatments (formation by plasma treatment H10P14/6319) · CPC title

• H10P14/6319

  Formation by plasma treatments, e.g. plasma oxidation of the substrate · CPC title

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title