Predicting semiconductor package warpage

US9772268B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9772268-B2
Application numberUS-201514672331-A
CountryUS
Kind codeB2
Filing dateMar 30, 2015
Priority dateMar 30, 2015
Publication dateSep 26, 2017
Grant dateSep 26, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for predicting the electrical functionality of a semiconductor package, the method includes performing a first stiffness test for a first semiconductor package, receiving failure data for the first semiconductor package, the failure data includes results of an electrical test performed after the first semiconductor package is assembled on a printed circuit board, generating a database comprising results of the first stiffness test as a function of the failure data for the first semiconductor package, performing a second stiffness test for a second semiconductor package, identifying a unique result from the results of the first stiffness test in the database, the unique result aligns with a result of the second stiffness test, and predicting a failure data for the second semiconductor package based on the failure data for the first semiconductor package which corresponds to the unique result of the first stiffness test identified in the database.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for predicting the electrical functionality of a semiconductor package, the method comprising: performing a first stiffness test for a first semiconductor package; receiving failure data for the first semiconductor package, the failure data comprises results of an electrical test performed after the first semiconductor package is assembled on a printed circuit board; generating a database comprising results of the first stiffness test for the first semiconductor package as a function of the failure data for the first semiconductor package; performing a second stiffness test for a second semiconductor package, the second stiffness test is carried out in a substantially similar manner as the first stiffness test; identifying a unique result from the results of the first stiffness test in the database, the unique result aligns with a result of the second stiffness test; and predicting a failure data for the second semiconductor package based on the failure data for the first semiconductor package which corresponds to the unique result of the first stiffness test identified in the database. 2. The method of claim 1 , wherein performing the first stiffness test comprises: applying a force to a corner of a cantilevered portion of the first semiconductor package, during which the first semiconductor package is stabilized in a fixture; measuring the force to bend the first semiconductor package; and recording stiffness test results including the force and a deflection of the corner of the cantilevered portion, wherein the force is recorded relative to the deflection of the corner. 3. The method of claim 1 , wherein performing the first stiffness test and the second stiffness test comprises: performing the first stiffness test and the second stiffness test in a temperature controlled chamber, at a predefined temperature; and recording the predefined temperature. 4. The method of claim 1 , wherein generating the database comprises: recording the properties of the first semiconductor package, the properties comprising at least one of laminate size, die size, lid shape, lid material, laminate composition, sealant material and the amount of sealant used. 5. The method of claim 4 , further comprising: modifying the properties of the second semiconductor package to change its stiffness based on the results of both the first and second stiffness tests and the electrical test data compiled in the database. 6. The method of claim 1 , further comprising: designing a new semiconductor package to have a predefined stiffness based on the results of both the first and second stiffness tests, the electrical test data, and properties of both the first and second semiconductor packages all compiled in the database, the predefined stiffness corresponds to one or more desirable failure data entries in the database. 7. A computer system for predicting the electrical functionality of a semiconductor package, the computer system comprising: one or more computer processors, one or more computer-readable storage media, and program instructions stored on one or more of the computer-readable storage media for execution by at least one of the one or more processors, the program instructions comprising: program instructions to perform a first stiffness test for a first semiconductor package; program instructions to receive failure data for the first semiconductor package, the failure data comprises results of an electrical test performed after the first semiconductor package is assembled on a printed circuit board; program instructions to generate a database comprising results of the first stiffness test for the first semiconductor package as a function of the failure data for the first semiconductor package; program instructions to perform a second stiffness test for a second semiconductor package, the program instructions to perform the second stiffness test are substantially similar to the program instructions to perform the first stiffness test; program instructions to identify a unique result from the results of the first stiffness test in the database, the unique result aligns with a result of the second stiffness test; and program instructions to predict a failure data for the second semiconductor package based on the failure data for the first semiconductor package which corresponds to the result of the first stiffness test identified in the database. 8. The computer system of claim 7 , wherein program instructions to perform the first stiffness test and the second stiffness test comprises: program instructions to perform the first stiffness test and the second stiffness test in a temperature controlled chamber at a predefined temperature; and program instructions to record the predefined temperature. 9. The computer system of claim 7 , wherein program instructions to generate the database comprises: program instructions to record properties of the first semiconductor package, the properties comprising at least one of laminate size, die size, lid shape, lid material, laminate composition, sealant material and the amount of sealant used. 10. The computer system of claim 7 , further comprising: program instructions to modify the properties of the second semiconductor package to change its stiffness based on the results of both the first and second stiffness tests and the electrical test data compiled in the database. 11. The computer system of claim 7 , further comprising: program instructions to design a new semiconductor package to have a predefined stiffness based on the results of both the first and second stiffness tests, the electrical test data, and properties of both the first and second semiconductor packages all compiled in the database, the predefined stiffness corresponds to one or more desirable failure data entries in the database.

Assignees

Inventors

Classifications

  • Temperature · CPC title

  • G01N3/42Primary

    by performing impressions under a steady load by indentors, e.g. sphere, pyramid (G01N3/54 takes precedence) · CPC title

  • Testing of IC packages; Test features related to IC packages (containers per se H10W76/10, encapsulations per se H10W74/00) · CPC title

  • Physics · mapped topic

  • G01M5/0075Primary

    by means of external apparatus, e.g. test benches or portable test systems (G01M5/005 takes precedence) · CPC title

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What does patent US9772268B2 cover?
A method for predicting the electrical functionality of a semiconductor package, the method includes performing a first stiffness test for a first semiconductor package, receiving failure data for the first semiconductor package, the failure data includes results of an electrical test performed after the first semiconductor package is assembled on a printed circuit board, generating a database …
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G01N3/42. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 26 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).