Carbon nanostructure device fabrication utilizing protect layers

Patent metadata

Field	Value
Publication number	US-9768288-B2
Application number	US-201615237350-A
Country	US
Kind code	B2
Filing date	Aug 15, 2016
Priority date	Oct 18, 2012
Publication date	Sep 19, 2017
Grant date	Sep 19, 2017

Abstract

Hall effect devices and field effect transistors are formed incorporating a carbon-based nanostructure layer such as carbon nanotubes and/or graphene with a sacrificial metal layer formed there over to protect the carbon-based nanostructure layer during processing.

First claim

What is claimed is:

1. A method for forming a device structure comprising:
selecting an insulating substrate having a carbon-based nanostructure layer on an upper surface;
forming a first layer of a first metal on said carbon-based nanostructure layer;
forming a first patterned layer having a first pattern on said first layer of a first metal;
transferring said first pattern to said first layer of a first metal and said carbon-based nanostructure layer to form a first patterned layer of a first metal and a first patterned carbon-based nanostructure layer there under;
removing said first patterned layer;
forming a layer of first material over said insulating substrate and said first patterned layer of a first metal, said layer of first material reactive with said first patterned layer of a first metal when raised to a predetermined temperature;
forming a layer of second material over said layer of first material; said layer of second material providing an electrically conductive diffusion barrier with respect to said layer of first material;
forming a second layer of metal over said layer of second material;
patterning said layer of first material, layer of second material and said second layer of metal to form source and drain regions spaced apart wherein respective regions have a portion on said patterned metal and a portion on said insulating substrate;
heating said layer of first material on said patterned metal to cause a reaction there between for forming a reacted region of one of a chemical compound and an alloy; and
selectively removing un-reacted patterned metal to expose said patterned carbon-based nanostructure layer between said source region and said drain region.

2. The method of claim 1 wherein said carbon-based nanostructure layer is selected from the group consisting of carbon-nanotubes and graphene.

3. The method of claim 1 wherein said first metal includes metal selected from the group consisting of Ni, Pd, amorphous silicon and polysilicon.

4. The method of claim 1 wherein forming said layer of second material is omitted.

5. The method of claim 1 further including:
forming a dielectric layer over said exposed patterned carbon-based nanostructure layer, sidewalls of said reacted region, sidewalls of said layer of second material, sidewalls of said second layer of metal and upper surface of said second layer;
forming a third layer of metal over said dielectric layer; and
patterning said third layer of metal to form an electrode on said dielectric layer over said regions of patterned carbon-based nanostructure layer located between said drain and source regions.

6. The method of claim 1 wherein
said forming a layer of second material provides an insulator in place of a conductive diffusion barrier;
wherein forming a second layer of metal over said layer of second material is deleted and
wherein patterning said second layer of metal is not performed.

7. The method of claim 6 further including:
forming a dielectric layer over said exposed patterned carbon-based nanostructure layer, sidewalls of said reacted region, sidewalls of said layer of second material, and upper surface of said layer of second material;
patterning said dielectric layer and said layer of second material to form openings in said dielectric layer and said layer of second material to said reacted regions and said layer of first material forming a respective source region and drain region;
forming a third layer of metal over said dielectric layer and said openings; and
patterning said third layer of metal to form a source electrode, drain electrode and gate electrode, said gate electrode on said dielectric layer over said regions of patterned carbon-based nanostructure layer located between said drain and source regions.

Assignees

• IBM

Inventors

• Chu Jack O
• Dimitrakopoulos Christos D
• Grill Alfred
• Mcardle Timothy J
• Pfeiffer Dirk
• Saenger Katherine L
• Wisnieff Robert L

Classifications

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P50/692

  characterised by their composition, e.g. multilayer masks or materials · CPC title

• H10P14/3464

  Nanotubes · CPC title

• H01L29/775 Primary

  Electricity · mapped topic

• H01L51/00

  Electricity · mapped topic