Selecting processor micro-threading mode

US9766948B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9766948-B2
Application numberUS-201514948277-A
CountryUS
Kind codeB2
Filing dateNov 21, 2015
Priority dateNov 11, 2015
Publication dateSep 19, 2017
Grant dateSep 19, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An approach is provided to dynamically select a micro-threading (MT) mode of each core of a processor based on a load on each of the respective cores while the processor is running a hypervisor. The approach sets a core's micro-threading mode to a whole-core mode (MT 1 ) in response to identifying that the load on the selected core is at a light load level, sets the core's micro-threading mode to a two-way micro-threading mode (MT 2 ) in response to identifying that the load on the selected core has increased above the light load level, and sets the selected core's micro-threading mode to a four-way micro-threading mode (MT 4 ) in response to identifying that the load on the selected core is at a high load level.

First claim

Opening claim text (preview).

What is claimed is: 1. A method that dynamically selects a micro-threading (MT) mode of each core of a processor based on a load on each of the respective cores while the processor is running a hypervisor, the method comprising: dynamically setting a selected core's micro-threading mode to a whole-core mode (MT 1 ) in response to identifying that the load on the selected core is at a first load level; dynamically setting the selected core's micro-threading mode to a two-way micro-threading mode (MT 2 ) in response to identifying that the load on the selected core has increased above the first load level to a second load level; dynamically setting the selected core's micro-threading mode to a four-way micro-threading mode (MT 4 ) in response to identifying that the load on the selected core has increased above the second load level to a third load level; entering a quest context after the setting of the micro-threading mode; and switching the micro-threading mode of the selected core to the whole-core mode (MT 1 ) upon the selected core exiting from the guest context. 2. The method of claim 1 further comprising: selecting a primary virtual core to execute on the selected core; scanning a plurality of preempted virtual cores; and selecting one or more of the preempted virtual cores to execute as secondary virtual cores along with the primary virtual core. 3. The method of claim 2 further comprising: selecting the micro-threading mode based on the selection of the secondary virtual cores. 4. The method of claim 3 further comprising: in response to a task executing on the primary virtual core requiring a service from a host process: placing the task on a preempted virtual cores list corresponding to a current CPU; and selecting a different task to execute on the primary virtual core. 5. The method of claim 4 further comprising: performing the service by the host process on the task; and removing the task from the preempted virtual cores list. 6. The method of claim 3 further comprising: performing any needed service in a host process in response to exiting from the guest context; and for each virtual CPU (vCPU) task scheduled to execute on the selected virtual core: add an entry to a vCore data structure pertaining to each vCPU task that is ready to execute on the selected virtual core; selecting one of the vCPU tasks as the runner task for the selected virtual core, wherein the runner task executes on the primary virtual core; and selecting one or more of the vCPU tasks as tasks to execute concurrently with the runner task on the selected virtual core.

Assignees

Inventors

Classifications

  • Hypervisor-specific management and integration aspects · CPC title

  • G06F9/5083Primary

    Techniques for rebalancing the load in a distributed system · CPC title

  • Starting, stopping, suspending or resuming virtual machine instances · CPC title

  • from multiple instruction streams, e.g. multistreaming · CPC title

  • according to execution mode, e.g. mode flag · CPC title

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What does patent US9766948B2 cover?
An approach is provided to dynamically select a micro-threading (MT) mode of each core of a processor based on a load on each of the respective cores while the processor is running a hypervisor. The approach sets a core's micro-threading mode to a whole-core mode (MT 1 ) in response to identifying that the load on the selected core is at a light load level, sets the core's micro-threading mode …
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F9/5083. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).