SiC trench transistor and method for its manufacture

Patent metadata

Field	Value
Publication number	US-9761706-B2
Application number	US-201415110180-A
Country	US
Kind code	B2
Filing date	Nov 21, 2014
Priority date	Jan 15, 2014
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

An SiC trench transistor having a first terminal and an epitaxial layer positioned vertically between a gate trench and a second terminal; a compensation layer extending horizontally being provided in the epitaxial layer, the compensation layer having an effective doping of a type opposite to the doping of the epitaxial layer. A method for manufacturing an SiC trench transistor is also provided, an epitaxial layer being provided on a second terminal of the SiC trench transistor; a compensation layer extending horizontally being implanted in the epitaxial layer, the compensation layer having an effective doping of a type opposite to the doping of the epitaxial layer; and a first terminal and a gate trench being provided above the compensation layer.

First claim

What is claimed is:

1. An SiC trench transistor having a first terminal and an epitaxial layer positioned vertically between a gate trench and a second terminal, wherein a compensation layer extending horizontally is provided in the epitaxial layer, the compensation layer having an effective doping of a type opposite to a doping of the epitaxial layer;
wherein the transistor is an SiC trench MOSFET, the first terminal is a source terminal, the second terminal is a drain structure, and the epitaxial layer is a drift zone; and
wherein a distance from the compensation layer to the gate trench is, at a maximum, 25% of a thickness of the drift zone.

2. A method for manufacturing an SiC trench transistor, comprising:
providing an epitaxial layer on a second terminal of the SiC trench transistor;
implanting a compensation layer in the epitaxial layer, the compensation layer extending horizontally and having an effective doping of a type opposite to a doping of the epitaxial layer; and
providing a first terminal and a gate trench above the compensation layer;
wherein the transistor is an SiC trench MOSFET, the first terminal is a source terminal, the second terminal is a drain structure, and the epitaxial layer is a drift zone; and
wherein a distance from the compensation layer to the gate trench is, at a maximum, 25% of a thickness of the drift zone.

3. The SiC trench transistor as recited in claim 1 , wherein an arithmetic mean of the doping of the compensation layer corresponds to the doping of the opposite type.

4. The SiC trench transistor as recited in claim 1 , wherein the compensation layer includes passages that have doping of the type of the drift zone.

5. The SiC trench transistor as recited in claim 1 , wherein the compensation layer includes an alternating sequence of p-doped and n-doped regions in a surface direction of the compensation layer.

6. The SiC trench transistor as recited in claim 1 , wherein the compensation layer includes an alternating pattern of p-doped and n-doped regions in two surface directions of the compensation layer.

Assignees

• Bosch Gmbh Robert

Inventors

• Qu Ning
• Jacke Thomas
• Grieb Michael
• Rambach Martin

Classifications

• H10D30/0297

  using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title

• H10D62/051

  Forming charge compensation regions, e.g. superjunctions · CPC title

• H10D12/038

  having a recessed gate, e.g. trench-gate IGBTs · CPC title

• H10D62/111

  Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures · CPC title

• H01L29/0847

  Electricity · mapped topic