Self-aligned deep contact for vertical FET

Patent metadata

Field	Value
Publication number	US-9761491-B1
Application number	US-201615370404-A
Country	US
Kind code	B1
Filing date	Dec 6, 2016
Priority date	Dec 6, 2016
Publication date	Sep 12, 2017
Grant date	Sep 12, 2017

Abstract

The present disclosure relates to semiconductor structures and, more particularly, to a self-aligned deep contact for a vertical field effect transistor (VFET) and methods of manufacture. The structure includes a plurality of fin structures, a first contact landing on a substrate material between a first set of fin structures of the plurality of fin structures, sidewalls of the first contact being in direct contact with an insulator material of the first set of the fin structures, and a second contact landing on a work function material between a second set of fin structures of the plurality of fin structures, sidewalls of the second contact being in direct contact with the insulator material of the second set of the fin structures.

First claim

What is claimed:

1. A structure, comprising:
a plurality of fin structures;
a first contact landing on a substrate material between a first set of fin structures of the plurality of fin structures, sidewalls of the first contact being in direct contact with an insulator material of the first set of the fin structures; and
a second contact landing on a work function material between a second set of fin structures of the plurality of fin structures, sidewalls of the second contact being in direct contact with the insulator material of the second set of the fin structures.

2. The structure of claim 1 , wherein the work function material is further provided between the insulator material and the sidewalls of the first set of fin structures.

3. The structure of claim 2 , wherein the plurality of fin structures comprise substrate material and an epitaxially grown material on the substrate material.

4. The structure of claim 3 , wherein the insulator material is below the epitaxially grown material.

5. The structure of claim 3 , wherein the first contact extends through an oxide layer on the substrate material, between the first set of fin structures.

6. The structure of claim 5 , further comprising a capping material on the epitaxially grown material.

7. The structure of claim 5 , further comprising a gate dielectric material on sidewalls of the first set of fin structures in direct contact with the work function material and the substrate material.

8. The structure of claim 1 , wherein the work function material is provided between the insulator material and sidewalls of the second set of fin structures and extends below an epitaxially grown material, partly forming the second set of fin structures.

9. The structure of claim 8 , wherein the insulator material is below the epitaxially grown material.

10. The structure of claim 9 , further comprising a capping material on the epitaxially grown material.

11. The structure of claim 8 , further comprising a gate dielectric material on the sidewalls of the second set of fin structures and below the work function material.

12. The structure of claim 8 , further comprising an oxide layer below the work function material of the second set of fin structures and the second contact.

13. The structure of claim 1 , wherein the first contact is a source or drain contact and the second contact is a gate contact for vertically oriented gate structures comprising the plurality of fin structures.

14. A structure, comprising:
a plurality of fin structures comprising a substrate material and an epitaxially grown material on the substrate material;
a source or drain contact landing on the substrate material between a first set of fin structures of the plurality of fin structures;
a gate contact landing on a work function material between a second set of fin structures of the plurality of fin structures; and
an insulator material in direct contact with the source or drain contact and the first set of fin structures and the gate contact and the second set of fin structures.

15. The structure of claim 14 , wherein the insulator material is below the epitaxially grown material.

16. The structure of claim 14 , further comprising a capping material on the epitaxially grown material.

17. The structure of claim 14 , wherein the work function material is provided between the insulator material and sidewalls of the first set of fin structures, and between the insulator material and sidewalls of the second set of fin structures.

18. The structure of claim 17 , further comprising a gate dielectric material on the sidewalls of the first set of fin structures in direct contact with the work function material and the substrate material, or where the gate dielectric material is on the sidewalls of the second set of fin structures and below the work function material which is below the gate contact.

19. A method, comprising:
forming a plurality of vertical fin structures;
forming a first contact landing on a substrate material between a first set of fin structures of the plurality of vertical fin structures, sidewalls of the first contact being in direct contact with an insulator material of the first set of the fin structures; and
forming a second contact landing on a work function material between a second set of fin structures of the plurality of vertical fin structures, sidewalls of the second contact being in direct contact with the insulator material of the second set of the fin structures.

20. The method of claim 19 , wherein the first contact is a source or drain contact and the second contact is a gate contact for vertically oriented gate structures comprising the plurality of vertical fin structures.

Assignees

• Globalfoundries Inc

Inventors

• Huang Haigou
• Wu Xusheng
• Zhang John H

Classifications

• H10W20/069 Primary

  by forming self-aligned vias or self-aligned contact plugs · CPC title

• H01L29/42392

  Electricity · mapped topic

• H01L21/76897 Primary

  Electricity · mapped topic

• H01L23/535

  Electricity · mapped topic

• H01L21/823437

  Electricity · mapped topic