Method of making a monolithically integrated RF system

Patent metadata

Field	Value
Publication number	US-9756737-B2
Application number	US-201514933778-A
Country	US
Kind code	B2
Filing date	Nov 5, 2015
Priority date	Dec 11, 2012
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

Radio frequency system ( 250 ) which includes a first and second sub-assembly ( 100, 200 ), each formed of a plurality of layers of conductive material ( 504, 508, 516 ) disposed on a substrate ( 102 ) and arranged in a stack. The stacked layers form signal processing components ( 108, 110 ) and at least one peripheral wall ( 104, 204 ) surrounding a walled area ( 118, 218 ) of each substrate. The second sub-assembly is positioned on the first sub-assembly with a first walled area of a first substrate aligned with a second walled area of a second substrate.

First claim

I claim:

1. A method for constructing an RF device, comprising:
forming a first sub-assembly by
first depositing on a first surface of a first substrate a first plurality of layers including at least one layer each of a conductive material and a sacrificial material; and
first controlling said deposit of said first plurality of layers to form on said first surface
at least a first peripheral wall surrounding a first walled area of said first substrate, said first peripheral wall extending a first predetermined distance away from said first surface to form a first ledge,
at least one first signal processing component disposed on said first surface of said first substrate within said walled area, and
at least one first transmission line element disposed on and extending a second predetermined distance away from and in a direction which is normal to said first surface; and

forming a second sub-assembly by
second depositing on a second surface of a second substrate a second plurality of layers including at least one layer each of said conductive material and said sacrificial material; and
second controlling said deposit of said second plurality of layers to form on said second surface
at least one second signal processing component within a second walled area, and
at least one second transmission line element disposed on and extending a third predetermined distance away from and in a direction normal to said second surface; and

positioning said second sub-assembly so that it is suspended on the first ledge of said first sub-assembly with said first walled area aligned with said second walled area;
forming an electrical connection directly between the first and second transmission line elements by aligning a central axis of the first transmission line element with a central axis of the second transmission line element and establishing direct electrical contact between abutting ends of the first and second transmission line elements; and
forming said electrical connection at a location aligned with said first ledge and between a first conductive trace disposed on the first substrate and a second conductive trace disposed on the second substrate.

2. The method according to claim 1 , further comprising selecting at least one of said first and second plurality of layers to include at least one layer of a dielectric material.

3. The method according to claim 1 , wherein said first controlling step further comprises arranging said first conductive trace on said first substrate to form at least a portion of an electrical connection between said first signal processing component and said second signal processing component.

4. The method according to claim 1 , wherein said positioning step further comprises suspending said second sub-assembly on said first ledge with said first surface spaced apart from said second surface.

5. The method according to claim 1 , wherein said second controlling step further comprises forming on said second surface at least a second peripheral wall surrounding said second walled area.

6. The method according to claim 5 , wherein said controlling step further comprises forming said second peripheral wall so that it extends a fourth predetermined distance away from said second surface and forms a second ledge.

7. The method according to claim 6 , wherein said positioning step further comprises aligning said second ledge on said first ledge to suspend said second sub-assembly on said first sub-assembly.

8. The method according to claim 5 , wherein said first and second controlling steps respectively further comprise forming the first conductive trace on said first substrate, and forming the second conductive trace on said second substrate.

9. The method according to claim 8 , further comprising forming said first and second conductive traces so that they together form at least a portion of an electrical connection between said first signal processing component and said second signal processing component.

10. The method according to claim 1 , wherein at least one of said first and second signal processing components is selected from the group consisting of a switch and a reactive component.

11. The method according to claim 10 , wherein at least one of said first and second controlling step further comprises forming an electrostatic actuator.

12. The method according to claim 11 , further comprising forming at least one electrical connection between said first and second signal processing components to form a tunable filter.

13. The method according to claim 1 , further comprising selecting said first and second substrates to be dielectric substrates.

14. The method according to claim 1 , further comprising forming said first peripheral wall of said conductive material.

15. A method for constructing an RF device, comprising:
forming a first sub-assembly by
first depositing on a first surface of a first substrate a first plurality of layers including at least one layer each of a conductive material and a sacrificial material; and
first controlling said deposit of said first plurality of layers to form on said first surface
at least a first peripheral wall surrounding a first walled area of said first substrate, said first peripheral wall extending a first predetermined distance away from said first surface to form a first ledge,
at least one first signal processing component disposed on said first surface of said first substrate within said walled area, and
at least one first transmission line element disposed on and extending a second predetermined distance away from and in a direction which is normal to said first surface; and

forming a second sub-assembly by
second depositing on a second surface of a second substrate a second plurality of layers including at least one layer each of said conductive material and said sacrificial material; and
second controlling said deposit of said second plurality of layers to form on said second surface
at least a second peripheral wall surrounding a second walled area of said second substrate, said second peripheral wall extending a third predetermined distance away from said second surface to form a second ledge,
at least one second signal processing component within the second walled area, and
at least one second transmission line element disposed on and extending a fourth predetermined distance away from and in a direction normal to said second surface; and

positioning said second ledge on said first ledge to suspend the second sub-assembly on the first sub-assembly with said first walled area aligned with said second walled area;
forming an electrical connection directly between the first and second transmission line elements by aligning a central axis of the first transmission line element with a central axis of the second transmission line element and establishing direct electrical contact between abutting ends of the first and second transmission line elements; and
forming said electrical connection aligned with a location where said first ledge abuts said second ledge to establish an interconnect between a first conductive trace disposed on the first substrate and a second conductive trace disposed on the second substrate.

16. The method according to claim 15 , further comprising selecting at least one of said first and second plurality of layers to include at least one layer of a dielectric material.

17. The method according to claim 15 , wherein said first controlling step further comprises forming said first conductive trace on said first substrate to form at least a portion of an

Assignees

• Harris Corp

Inventors

• Rogers John E

Classifications

• H05K7/06

  on insulating boards {, e.g. wiring harnesses (for printed circuits H05K1/18, H05K3/30)} · CPC title

• H05K13/00

  Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components · CPC title

• H01P11/003

  Manufacturing lines with conductors on a substrate, e.g. strip lines, slot lines · CPC title

• Y10T29/49155

  Manufacturing circuit on or in base · CPC title

• H05K1/0239

  Signal transmission by AC coupling · CPC title