Device and method for an electronic circuit having a driver and rectifier

US9755639B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9755639-B2
Application numberUS-201614990354-A
CountryUS
Kind codeB2
Filing dateJan 7, 2016
Priority dateMar 2, 2015
Publication dateSep 5, 2017
Grant dateSep 5, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

In accordance with an embodiment, a method includes driving a transistor device by a driver having an output coupled to a control node of the transistor through a capacitor and limiting a magnitude of a voltage of one polarity between the control node and a first load node of the transistor device by a rectifier circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic circuit, comprising: a transistor device comprising a control node and a first load node; a driver having an input configured to receive an input signal and at least one output comprising a first output configured to provide a first drive signal based on the input signal, and a second output configured to provide a second drive signal based on the input signal; a capacitor coupled between the at least one output and the control node of the transistor device, wherein each of the first output and the second output is coupled to the capacitor; and a rectifier circuit connected between the first load node and the control node of the transistor device. 2. The electronic circuit of claim 1 , wherein the rectifier circuit is integrated with the transistor device. 3. The electronic circuit of claim 1 , wherein the transistor device has wide-bandgap properties. 4. The electronic circuit of claim 3 , wherein the transistor device is a GaN device, the control node is a gate node and the first load node is a source node. 5. The electronic circuit of claim 4 , wherein the GaN device is a GaN GIT device. 6. The electronic circuit of claim 1 , further comprising a first resistor connected in parallel with the capacitor. 7. The electronic circuit of claim 6 , further comprising a second resistor coupled between the at least one output and the first resistor. 8. The electronic circuit of claim 1 , further comprising a first resistor and a second resistor, wherein the second resistor is coupled in series with the capacitor to form a series circuit, and the first resistor is coupled in parallel with the series circuit. 9. The electronic circuit of claim 1 , wherein the rectifier circuit comprises at least one bipolar diode. 10. The electronic circuit of claim 1 , wherein the rectifier circuit comprises a plurality of bipolar diodes connected in series. 11. The electronic circuit of claim 1 , wherein the rectifier circuit comprises a series circuit with a bipolar diode and a Zener diode connected back-to-back. 12. The electronic circuit of claim 1 , further comprising: a first resistor coupled in parallel with the capacitor; a second resistor coupled between the first output and the capacitor; and a third resistor coupled between the second output and the capacitor. 13. The electronic circuit of claim 1 , further comprising a second resistor connected between the first output and the capacitor. 14. The electronic circuit of claim 1 , further comprising a third resistor connected between the second output and the capacitor. 15. The electronic circuit of claim 1 , wherein a reference terminal of the driver and a reference terminal are coupled to a reference node. 16. The electronic circuit of claim 15 , wherein the reference node is a ground node. 17. A drive circuit, comprising: an output comprising a first output node configured to be connected to a gate node of a transistor device and a second output node configured to be connected to a first load node of the transistor device; a driver having an input configured to receive an input signal and at least one output configured to provide a drive signal based on the input signal, wherein the driver comprises a first output configured to provide a first drive signal based on the input signal and a second output configured to provide a second drive signal based on the input signal; a capacitor coupled between the at least one output of the driver and the first output node, wherein each of the first output and the second output is coupled to the capacitor; and a rectifier circuit connected between the second output node and the first output node. 18. The drive circuit of claim 17 , further comprising: a first resistor connected in parallel with the capacitor. 19. The drive circuit of claim 17 , wherein the rectifier circuit comprises at least one bipolar diode. 20. The drive circuit of claim 17 , wherein the rectifier circuit comprises a plurality of bipolar diodes connected in series. 21. The drive circuit of claim 17 , wherein the rectifier circuit comprises a series circuit with a bipolar diode and a Zener diode connected back-to-back. 22. The drive circuit of claim 17 , further comprising: a first resistor coupled in parallel with the capacitor; a second resistor coupled between the first output and the capacitor; and a third resistor coupled between the second output and the capacitor. 23. The drive circuit of claim 17 , further comprising: a second resistor connected between the first output and the capacitor. 24. The drive circuit of claim 17 , further comprising: a third resistor connected between the second output and the capacitor. 25. A method, comprising: driving a transistor device by a driver having an output coupled to a control node of the transistor device through a capacitor, wherein the driver is configured to provide a drive signal at the output based on an input signal, the driver comprises a first output configured to provide a first drive signal based on the input signal and a second output configured to provide a second drive signal based on the input signal, and each of the first output and the second output is coupled to the capacitor; and limiting a magnitude of a voltage of one polarity between the control node and a first load node of the transistor device by a rectifier circuit. 26. The method of claim 25 , wherein the transistor device has wide-bandgap properties. 27. The method of claim 26 , wherein the transistor device is a GaN device. 28. The method of claim 27 , wherein the GaN device is a GaN GIT device. 29. The method of claim 25 , wherein the voltage of the one polarity is a negative voltage between the control node and the first load node.

Assignees

Inventors

Classifications

  • by measures taken in the control circuit · CPC title

  • by feedback from the output circuit to the control circuit · CPC title

  • the devices being field-effect transistors · CPC title

  • H03K17/74Primary

    by the use, as active elements, of diodes (by the use of more than one type of semiconductor device H03K17/567; by the use of tunnel diodes H03K17/58; by the use of negative resistance diodes H03K17/70) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9755639B2 cover?
In accordance with an embodiment, a method includes driving a transistor device by a driver having an output coupled to a control node of the transistor through a capacitor and limiting a magnitude of a voltage of one polarity between the control node and a first load node of the transistor device by a rectifier circuit.
Who is the assignee on this patent?
Infineon Technologies Austria Ag
What technology area does this patent fall under?
Primary CPC classification H03K17/0412. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).