Controlled bootstrap driver for high side electronic switching device

Patent metadata

Field	Value
Publication number	US-9705423-B1
Application number	US-201615052238-A
Country	US
Kind code	B1
Filing date	Feb 24, 2016
Priority date	Feb 24, 2016
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

The subject matter of this specification can be embodied in, among other things, a phase circuit having an output port, and a high side circuit having a first input port, a high side switching device configured to receive power from a high side power bus and switch power to the output port based on a first input signal received at the first input port, a voltage regulating device having a regulator input port, and a bootstrap capacitor coupled between the voltage regulating device and the output port, wherein the regulating device is configured to receive power from the high side power bus and controllably supply power to the bootstrap capacitor based on a regulator input voltage received at the regulator input port, the regulator input voltage based on a voltage difference between a voltage present on the output port and a voltage present on the high side power bus.

First claim

What is claimed is:

1. A circuit comprising:
a phase circuit comprising:
an output port; and
a high side circuit comprising:
a first input port;
a high side switching device configured to receive power from a high side power bus and switch power to the output port based on a first input signal received at the first input port;
a voltage regulating device having a regulator input port; and
a bootstrap capacitor coupled between the voltage regulating device and the output port;
wherein the voltage regulating device is configured to receive power from the high side power bus and controllably supply power to the bootstrap capacitor based on a regulator input voltage received at the regulator input port, the regulator input voltage based on a voltage difference between a voltage present on the output port and a voltage present on the high side power bus.

2. The circuit of claim 1 , further comprising a diode coupled between the output port and the regulator input port, wherein the based on a voltage difference between a voltage on the bootstrap capacitor and a reverse breakdown voltage of the diode.

3. The circuit of claim 2 , wherein the diode is a Zener diode.

4. The circuit of claim 1 , the high side circuit further comprising a resistor coupled between the high side power bus and the regulator input port.

5. The circuit of claim 1 , the phase circuit further comprising:
a low side circuit comprising:
a second input port; and
a low side switching device configured to receive power from the output port and switch the power to a low side power bus based on a second input signal received at the second input port.

6. The circuit of claim 5 , wherein the low side power bus is at ground.

7. The circuit of claim 5 , wherein the first input signal is not active when the second input signal is active, and the second input signal is not active when the input signal is active.

8. The circuit of claim 5 , wherein the voltage regulating device is configured to receive power from the high side power bus and controllably supply power to the bootstrap capacitor when both of the first input signal and the second input signal are not active.

9. The circuit of claim 1 , wherein the circuit is an inverter power supply comprising:
the phase circuit, and
at least another phase circuit configured to switch power to another output port based on another input signal received at another input port, and receive power from the high side power bus and controllably supply power to another bootstrap capacitor.

10. A method of operating an inverter power supply, the method comprising:
providing power received from a high side power bus to a first switching device configured to switch power to an output port based on a first input signal received at a first input port;
providing power received from the high side power bus to a voltage regulating device configured to controllably supply power to a bootstrap capacitor coupled between the voltage regulating device and the output port based on a regulator input voltage received at a regulator input port;
providing, by the first switching device and in response to the first signal, power to the output port;
blocking, by the first switching device and in absence of the first input signal, power from the output port;
receiving, at the regulator input port, the regulator input voltage as a voltage difference between an output voltage on the output port and a voltage present on the high side power bus;
operating the voltage regulating device based on the regulator input voltage; and
charging the bootstrap capacitor with power received from the high side power bus.

11. The method of claim 10 , wherein receiving, at the regulator input port, the regulator input voltage as a voltage difference between an output voltage on the output port and a voltage present on the high side power bus further comprises providing the output voltage to the regulator input port through a diode coupled between the output port and the regulator input port, wherein the regulator input voltage is further based on a voltage difference between a voltage on the bootstrap capacitor and a reverse breakdown voltage of the diode.

12. The method of claim 11 , wherein the diode is a Zener diode.

13. The method of claim 11 , wherein charging the bootstrap capacitor with power from the high side power bus further comprises providing power to the bootstrap capacitor through a resistor coupled between the power supply and the regulator input port.

14. The method of claim 10 , further comprising providing the output voltage to ground through a second switching device configured to switch the output voltage to a low side power bus based on a second input signal received at a second input port.

15. The method of claim 14 , wherein the first input signal is not active when the second input signal is active, and the second input signal is not active when the first input signal is active.

16. The method of claim 15 , further comprising charging the bootstrap capacitor with power received from the high side power bus when both the first input signal and the second input signal are not active.

17. The method of claim 10 , further comprising:
providing power received from the high side power bus to a second switching device configured to switch power to a second output port based on a second input signal received at a second input port;
providing power received from the high side power bus to a second voltage regulating device configured to controllably supply power to a second bootstrap capacitor coupled between the second voltage regulating device and the second output port based on a second regulator input voltage received at a second regulator input port;
providing, by the second switching device and in response to the second input signal, power to the second output port;
blocking, by the second switching device and in absence of the second input signal, power from the output port;
receiving, at the second regulator input port, the second regulator input voltage as a second voltage difference between a second output voltage on the second output port and the voltage present on the high side power bus;
operating the second voltage regulating device based on the second regulator input voltage, wherein the second regulator input voltage is based on a second voltage difference between the second output voltage and the voltage present on the high side power bus; and
charging the second bootstrap capacitor with power received from the high side power bus.

18. The method of claim 10 , further comprising:
providing the output voltage to an electric actuator;
stalling the electric actuator to create a stall condition; and
charging the bootstrap capacitor from the high side power bus during the stall condition.

19. The method of claim 10 , wherein the first input signal is a direct current (DC) signal.

20. The method of claim 10 , wherein the first input signal is a pulse width modulated (PWM) signal.

21. The method of claim 17 , wherein the first input signal is a 0% duty cycle PWM signal.

Assignees

• Woodward Inc

Inventors

• Micic Dragan

Classifications

• H03K17/0412

  by measures taken in the control circuit · CPC title

• H03K17/567 Primary

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• H03K2217/0063

  High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load · CPC title

• H02M7/538

  in a push-pull configuration (H02M7/5375 takes precedence {; with oscillating arrangements H02M7/53832, H02M7/53846}) · CPC title

• H02M7/539 Primary

  with automatic control of output wave form or frequency (H02M7/5375 - H02M7/5387 take precedence) · CPC title