Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits

Patent metadata

Field	Value
Publication number	US-9754897-B2
Application number	US-201514721677-A
Country	US
Kind code	B2
Filing date	May 26, 2015
Priority date	Jun 2, 2014
Publication date	Sep 5, 2017
Grant date	Sep 5, 2017

Abstract

A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding layer provides protection for the enclosed semiconductor devices against EMI, RFI, or other inter-device interference, whether generated internally or from external semiconductor devices. The shielding layer is electrically connected to an external low-impedance ground point. A second component is disposed adjacent to the first component. The second component includes a passive device. An LC circuit includes the first component and second component. A semiconductor die is disposed adjacent to the first component. A conductive adhesive is disposed over the modular interconnect structure. The modular interconnect structure includes a height less than a height of the first component.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a first component including a discrete capacitor;
disposing a discrete inductor adjacent to the first component;
disposing a modular interconnect structure adjacent to the first component with the modular interconnect structure including a base material and a conductive layer formed on the base material;
forming a first interconnect structure over the first component, discrete inductor, and modular interconnect structure;
forming a trench in the modular interconnect structure; and
forming a shielding layer over the first component, discrete inductor, modular interconnect structure, and first interconnect structure and extending into the trench.

2. The method of claim 1 , further including disposing a conductive adhesive over the modular interconnect structure.

3. The method of claim 1 , wherein the modular interconnect structure includes a height greater than a height of the first component.

4. The method of claim 1 , further including forming the first interconnect structure to include a ground plane directly over the first component.

5. The method of claim 1 , wherein forming a trench in the modular interconnect structure includes fully singulating the modular interconnect structure.

6. A method of making a semiconductor device, comprising:
providing a first component;
disposing an encapsulant over the first component;
forming a first interconnect structure over the first component and encapsulant;
forming a shielding layer over the first component, encapsulant, and first interconnect structure; and
singulating the semiconductor device with a width of the first interconnect structure greater than a width of the shielding layer.

7. The method of claim 6 , further including disposing a second component adjacent to the first component.

8. The method of claim 7 , wherein the second component includes a passive device.

9. The method of claim 7 , further including forming an LC circuit including the first component and second component.

10. The method of claim 6 , further including disposing a semiconductor die adjacent to the first component.

11. A semiconductor device, comprising:
a first component;
a passive device disposed adjacent to the first component;
a modular interconnect structure disposed adjacent to the first component;
a first interconnect structure formed over the first component and modular interconnect structure; and
a shielding layer formed over the first component, modular interconnect structure, and first interconnect structure.

12. The semiconductor device of claim 11 , further including an LC circuit including the first component and passive device.

13. The semiconductor device of claim 11 , further including a conductive adhesive disposed over the modular interconnect structure.

14. The semiconductor device of claim 11 , wherein the modular interconnect structure includes a height less than a height of the first component.

15. The semiconductor device of claim 11 , wherein the shielding layer contacts a side surface of the modular interconnect structure.

16. A semiconductor device, comprising:
a first component;
an encapsulant disposed over the first component;
a conductive layer disposed over the encapsulant and including a surface coplanar with a side surface of the encapsulant;
a first interconnect structure formed over the first component, conductive layer, and encapsulant; and
a shielding layer formed over the first component, encapsulant, and first interconnect structure and contacting the conductive layer.

17. The semiconductor device of claim 16 , further including a second component disposed adjacent to the first component.

18. The semiconductor device of claim 17 , wherein the second component includes a passive device.

19. The semiconductor device of claim 16 , further including a semiconductor die disposed adjacent to the first component.

20. The semiconductor device of claim 16 , further including a modular interconnect structure including the conductive layer.

Assignees

• Stats Chippac Ltd
• Stats Chippac Pte Ltd

Inventors

• Lin Yaojian
• Han Byung Joon
• Pendse Rajendra D
• Shim Il Kwon
• Marimuthu Pandi C
• Choi Won Kyoung
• Chua Linda Pei Ee

Classifications

• H10W42/276

  the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

• H10W74/10

  characterised by their shape or disposition · CPC title

• H10W74/142

  the encapsulations exposing the passive side of the semiconductor body · CPC title

• H10W72/874

  On different surfaces · CPC title

• H10W72/9413

  on encapsulations · CPC title