Method and apparatus to facilitate direct surface cooling of a chip within a 3D stack of chips using optical interconnect

Patent metadata

Field	Value
Publication number	US-9748218-B1
Application number	US-201715434289-A
Country	US
Kind code	B1
Filing date	Feb 16, 2017
Priority date	Jun 29, 2016
Publication date	Aug 29, 2017
Grant date	Aug 29, 2017

Abstract

In one embodiment, the disclosure relates to a system of stacked and connected layers of circuits that includes at least one pair of adjacent layers having very few physical (electrical) connections. The system includes multiple logical connections. The logical interconnections may be made with light transmission. A majority of physical connections may provide power. The physical interconnections may be sparse, periodic and regular. The exemplary system may include physical space (or gap) between the a pair of adjacent layers having few physical connections. The space may be generally set by the sizes of the connections. A constant flow of coolant (gaseous or liquid) may be maintained between the adjacent pair of layers in the space.

First claim

What is claimed is:

1. A method to form a chip stack, the method comprising:
forming a first microchip having a first plurality of light emitting diodes (LEDs) at a surface thereof, the first microchip having a plurality of first metal interconnects;
forming a second microchip having a second plurality of LEDs at a surface thereof, the second microchip having a plurality of second metal interconnects;
aligning the first microchip with the second microchip to form an aperture between the first microchip and the second microchip, the aperture defining a plurality of optical paths for optical data communication between the first plurality of LEDs of the first microchip and the second plurality of LEDs of the second microchip;
interconnecting the first plurality of metal interconnects with the second plurality of metal interconnects, the metal interconnects exclusively communicating power or ground between the first microchip and the second microchip;
disposing a coolant in the aperture, the aperture configured to receive incoming coolant at an aperture inlet and to exit coolant at an aperture outlet;
wherein the all data communications between the first microchip and the second microchip is exclusively through surface-to-surface optical communication, and
wherein the pitch distance between adjacent metal interconnects is about 400-500μ.

Assignees

• IBM

Inventors

• Emma Philip G

Classifications

• H04B10/801

  using optical interconnects, e.g. light coupled isolators, circuit board interconnections · CPC title

• H10W76/10

  Containers or parts thereof · CPC title

• H10W72/071

  Connecting or disconnecting · CPC title

• H10W40/70

  Fillings or auxiliary members in containers or in encapsulations for thermal protection or control · CPC title

• H10W40/47

  by flowing liquids, e.g. forced water cooling · CPC title