System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits

Patent metadata

Field	Value
Publication number	US-9741920-B1
Application number	US-201514844866-A
Country	US
Kind code	B1
Filing date	Sep 3, 2015
Priority date	Jan 8, 2010
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.

First claim

What is claimed is:

1. A superconducting integrated circuit, comprising:
a Josephson junction trilayer having a hydrogen-sensitive barrier layer disposed between two superconducting layers and forming at least one Josephson junction switching device;
a hydrogen-diffusion barrier layer formed on at least one surface of the Josephson junction trilayer of a material subject to induced superconductivity at a cryogenic operating temperature of the Josephson junction trilayer; and
a superconducting connection layer which is a source of the diffusible hydrogen, configured to form a non-switching superconducting circuit current flow path through the induced superconductivity hydrogen-diffusion barrier layer to one of the two superconducting layers of the Josephson junction trilayer,
wherein the hydrogen-diffusion barrier layer sufficiently blocks hydrogen diffusion from the superconducting connection layer into the Josephson junction switching device at a storage temperature of 290K to ensure stable switching of the at least one Josephson junction switching device over time after cooling the superconducting integrated circuit to the cryogenic operating temperature.

2. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer is patterned together with at least one of the two superconducting layers of the Josephson junction trilayer in a common photolithographic mask step to form the at least one Josephson junction switching device.

3. The superconducting integrated circuit according to claim 1 , wherein hydrogen-diffusion barrier layer is configured to sufficiently block a diffusion of hydrogen from the superconducting connection layer into the at least one Josephson junction switching device to assure stable switching characteristics of the Josephson junction switching device when stored at temperatures below 350K.

4. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer has a hydrogen diffusion coefficient which is different from the two superconducting layers and the superconductor connection layer.

5. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer has a hydrogen absorption coefficient sufficiently high to reduce a net transport of hydrogen from the superconducting connection layer into the at least one Josephson junction switching device.

6. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer chemically reacts with hydrogen to reduce net transport of hydrogen from the superconducting connection layer into the at least one Josephson junction switching device.

7. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer further acts as an etch stop layer to protect the Josephson junction trilayer during etching of other structures.

8. The superconducting integrated circuit according to claim 1 , wherein the barrier layer is selected from the group consisting of aluminum oxide, aluminum nitride, magnesium oxide, doped Si, doped Ge, doped GaN, and a transition metals silicide.

9. A method of forming a superconducting integrated circuit, comprising:
forming a Josephson junction trilayer having a hydrogen-sensitive barrier layer disposed between two superconducting layers on a substrate, each superconducting layer having a hydrogen diffusion characteristic;
forming a hydrogen-diffusion barrier layer on an upper surface of the Josephson junction trilayer adjacent to an upper superconducting layer, the hydrogen-diffusion barrier layer comprising a material subject to induced superconductivity at a cryogenic operating temperature of the Josephson junction trilayer and reduced hydrogen diffusion with respect to the upper superconducting layer;
patterning at least the upper superconducting layer together with the hydrogen-diffusion layer for form at least one Josephson junction switching device having a switching characteristic sensitive to hydrogen diffusion; and
forming and patterning a superconducting connection layer having diffusible hydrogen on the hydrogen-diffusion barrier layer, to form a non-switching current flow path through the induced superconductivity hydrogen-diffusion barrier layer to the upper superconductive layer,
blocking hydrogen diffusion from the superconducting connection layer, through the hydrogen-diffusion barrier layer, into the Josephson junction switching device, sufficient to ensure stable switching characteristics after storage of the superconducting integrated circuit at a temperature of 290K.

10. The method according to claim 9 , further comprising cooling the superconducting integrated circuit to the cryogenic operating temperature and causing the at least one Josephson junction switching device to switch.

11. The method according to claim 10 , wherein the cryogenic operating temperature is below 50K.

12. The method according to claim 9 , wherein said patterning comprises using the hydrogen-diffusion barrier layer as an etch stop to protect an underlying portion of the upper superconducting layer during etching, wherein said etching generates hydrogen.

13. The method according to claim 9 , wherein the hydrogen-diffusion barrier layer is formed of a material having at least one chemical characteristic selected from the group consisting of etch susceptibility, hydrogen diffusion coefficient, hydrogen affinity, hydrogen permeability, hydrogen solubility, and hydrogen reactivity, which is different from each of the upper superconducting layer and the superconducting connection layer.

14. The method according to claim 1 , wherein the at least one Josephson junction switching device is formed into at least a portion of a quantum computing element, further comprising conducting at least one quantum computing operation with the quantum computing element.

15. A method of forming a superconducting integrated circuit, comprising:
depositing a Josephson junction trilayer having a diffusible component-sensitive barrier layer;
depositing a diffusion impeding layer on a surface of an upper superconducting layer of the Josephson junction trilayer, the diffusion impeding layer comprising a material that exhibits superconductivity or induced superconductivity substantially without switching at a cryogenic operating temperature of the Josephson junction trilayer;
patterning the diffusion impeding layer together with at least the upper superconducting surface of the Josephson junction trilayer to form at least one diffusible component-sensitive Josephson junction;
depositing a superconducting connection layer on at least the patterned diffusion impeding layer, to form a superconducting current flow path at the cryogenic operating temperature between the upper superconducting layer of the Josephson junction trilayer, through the patterned diffusion impeding layer, to the superconducting connection layer, while substantially impeding diffusion of the diffusible component from the superconducting connection layer, through the diffusion impeding layer, to the upper superconducting layer of the Josephson junction trilayer; and
conducting at least one chemical process step which generates the diffusible component, wherein the diffusion barrier layer protects the diffusible component-sensitive barrier layer during the at least one chemical process step.

16. The method according to claim 15 , further comprising planarizing the superconducting integrated circuit after said patterning.

17. The method according to claim 15 ,

Assignees

• Hypres Inc
• Hypres Inc

Inventors

• Tolpygo Sergey K
• Amparo Denis
• Hunt Richard
• Vivalda John
• Yohannes Daniel

Classifications

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H01L39/223

  Electricity · mapped topic

• H01L39/025

  Electricity · mapped topic

• H01L39/2493 Primary

  Electricity · mapped topic

• H10N60/805

  for Josephson-effect devices · CPC title