Scalable voltage source

Patent metadata

Field	Value
Publication number	US-9741874-B2
Application number	US-201615268884-A
Country	US
Kind code	B2
Filing date	Sep 19, 2016
Priority date	Sep 19, 2015
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

A scalable voltage source having a number N of partial voltage sources implemented as semiconductor diodes connected to one another in series, wherein each of the partial voltage sources has a semiconductor diode with a p-n junction. A tunnel diode is formed between sequential pairs of partial voltage sources, wherein the tunnel diode has multiple semiconductor layers with a larger band gap than the band gap of the p/n absorption layers and the semiconductor layers with the larger band gap are each made of a material with modified stoichiometry and/or a different elemental composition than the p/n absorption layers of the semiconductor diode. The partial voltage sources and the tunnel diodes are monolithically integrated together, and jointly form a first stack with a top and a bottom, and the number N of partial voltage sources is greater than or equal to two.

First claim

What is claimed is:

1. A scalable voltage source comprising:
a number N of partial voltage sources formed as semiconductor diodes connected to one another in series, each of the partial voltage sources having a semiconductor diode with a p-n junction, the semiconductor diode having a p-doped absorption layer and having an n absorption layer, the n absorption layer being passivated by an n-doped passivation layer with a larger band gap than a band gap of the n absorption layer, the partial source voltages of the individual partial voltage sources having a deviation of less than 20% from one another; and
a tunnel diode formed between sequential pairs of partial voltage sources, the tunnel diode having multiple semiconductor layers with a larger band gap than the band gap of the p absorption layer and the n absorption layer, the semiconductor layers with the larger band gap being each made of a material with modified stoichiometry and/or a different elemental composition than the p/n p absorption layer and the n absorption layer of the semiconductor diode,
wherein the partial voltage sources and the tunnel diodes are monolithically integrated together and jointly form a first stack with a top and a bottom, the number N of partial voltage sources being greater than or equal to two,
wherein, at an illumination of the first stack with light, the light strikes the first stack on a surface on the top and a size of the illuminated surface on the first stack top corresponds essentially to a size of an area of the first stack at the top,
wherein the first stack has a thickness of less than 12 μm,
wherein at 300 K the first stack has a source voltage of greater than 2.2 volts as long as the first stack is irradiated with light,
wherein a total thickness of the p and n absorption layers of a semiconductor diode increases from the topmost semiconductor diode to the bottommost semiconductor diode in a direction of incident light from the top of the first stack to the bottom of the first stack,
wherein each p absorption layer of the semiconductor diode is passivated by a p-doped passivation layer with a larger band gap than the band gap of the p absorption layer, and
wherein a continuous shoulder is formed in a vicinity of the bottom of the first stack and a height of the shoulder is greater than 100 nm.

2. The scalable voltage source according to claim 1 , wherein the partial source voltages of the partial voltage sources have a deviation of less than 10% from one another.

3. The scalable voltage source according to claim 1 , wherein the semiconductor diodes each have the same semiconductor material.

4. The scalable voltage source according to claim 1 , wherein a first voltage terminal is formed on the top of the first stack as a continuous first metal contact in a vicinity of an edge or as a single contact area on the edge.

5. The scalable voltage source according to claim 1 , wherein a second stack is formed, and the first stack and the second stack are arranged next to one another on a shared carrier, and wherein the two stacks are connected to one another in series such that the source voltage of the first stack and the source voltage of the second stack add together.

6. The scalable voltage source according to claim 1 , wherein a semiconductor mirror is formed below the bottommost semiconductor diode of the first stack.

7. The scalable voltage source according to claim 1 , wherein the semiconductor layers of the first stack comprises arsenide-containing layers and phosphide-containing layers.

8. The scalable voltage source according to claim 1 , wherein a corner of the first stack has a minimum of 5 μm and a maximum of 500 μm of spacing from an immediately adjacent lateral face of a substrate.

9. The scalable voltage source according to claim 1 , wherein exactly two semiconductor diodes are arranged on a germanium substrate, and the semiconductor diodes each include an InGaAs compound lattice-matched to a Ge substrate as an absorption material.

10. The scalable voltage source according to claim 1 , wherein the first stack has a base area smaller than 2 mm 2 or smaller than 1 mm 2 .

11. The scalable voltage source according to claim 10 , wherein the base area is quadrilateral in design.

12. The scalable voltage source according to claim 1 , wherein a second voltage terminal is formed on the bottom of the first stack.

13. The scalable voltage source according to claim 12 , wherein the second voltage terminal is formed by a substrate.

14. The scalable voltage source according to claim 1 , wherein the first stack is arranged on a substrate, and wherein the substrate comprises a semiconductor material.

15. The scalable voltage source according to claim 14 , wherein the semiconductor material and/or the substrate are formed of III-V materials.

16. The scalable voltage source according to claim 14 , wherein the substrate includes germanium or gallium arsenide.

17. The scalable voltage source according to claim 1 , wherein an intrinsic layer is formed between the p absorption layer and the n absorption layer in at least one semiconductor diode.

18. The scalable voltage source according to claim 17 , wherein the intrinsic layer is formed at the bottommost semiconductor diode.

19. The scalable voltage source according to claim 17 , wherein the intrinsic layer is formed at all semiconductor diodes.

Assignees

• Azur Space Solar Power Gmbh

Inventors

• Fuhrmann Daniel
• Khorenko Victor
• Guter Wolfgang

Classifications

• H01L31/03046

  Electricity · mapped topic

• H01L31/0693

  Electricity · mapped topic

• H01L31/02019

  Electricity · mapped topic

• H01L29/205

  Electricity · mapped topic

• H01L29/88 Primary

  Electricity · mapped topic