Methods to form high density through-mold interconnections

Patent metadata

Field	Value
Publication number	US-9741692-B2
Application number	US-201414767471-A
Country	US
Kind code	B2
Filing date	Sep 15, 2014
Priority date	Sep 15, 2014
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

Methods of fabricating a microelectronic device comprising forming a microelectronic substrate having a plurality microelectronic device attachment bond pads and at least one interconnection bond pad formed in and/or on an active surface thereof, attaching a microelectronic device to the plurality of microelectronic device attachment bond pads, forming a mold chase having a mold body and at least one projection extending from the mold body, wherein the at least one projection includes at least one sidewall and a contact surface, contacting the mold chase projection contact surface to a respective microelectronic substrate interconnection bond pad, disposing a mold material between the microelectronic substrate and the mold chase, and removing the mold chase to form at least one interconnection via extending from a top surface of the mold material to a respective microelectronic substrate interconnection bond pad.

First claim

The invention claimed is:

1. A method of fabricating a microelectronic device comprising:
forming a microelectronic substrate having a plurality of microelectronic device attachment bond pads and at least one interconnection bond pad formed in and/or on an active surface thereof;
attaching a microelectronic device to the plurality of microelectronic device attachment bond pads;
forming a mold chase having a mold body and at least one projection extending from the mold body, wherein the at least one projection includes at least one sidewall and a contact surface, and wherein the at least one projection includes a portion comprising a resilient material that is different from the material of the remainder of the at least one projection, and wherein the portion of the at least one projection includes the mold chase projection contact surface;
contacting the at least one mold chase projection contact surface to a respective microelectronic substrate interconnection bond pad;
disposing a mold material between the microelectronic substrate and the mold chase; and
removing the mold chase to form at least one interconnection via extending from a top surface of the mold material to a respective microelectronic substrate interconnection bond pad.

2. The method of claim 1 , further comprising filling the at least one interconnection via with a conductive material to form a through-mold interconnection.

3. The method of claim 1 , further comprising curing the mold material prior the removing the mold chase.

4. The method of claim 1 , wherein disposing the mold material comprises disposing the mold material between the microelectronic substrate and the mold chase to substantially encapsulate the microelectronic device and surrounds the at least one interconnection projection sidewall.

5. The method of claim 1 , wherein forming the microelectronic substrate comprises forming a microelectronic substrate having an active surface with a plurality microelectronic device attachment bond pads and at least one interconnection bond pad having a protective bump formed in and/or on the microelectronic substrate active surface.

6. The method of claim 5 , wherein forming the microelectronic substrate comprises forming the protective bump from a solder material.

7. The method of claim 1 , wherein contacting the mold chase projection contact surface to a respective microelectronic substrate interconnection bond pad comprises contacting the mold chase projection contact surface to a respective protective bump of the microelectronic substrate interconnection bond pad.

8. The method of claim 1 , wherein the at least one mold chase projection has a cross section shape having a width greater than a height.

9. The method of claim 1 , wherein attaching a microelectronic device to the plurality of microelectronic device attachment bond pads comprises forming solder interconnects between microelectronic device to the plurality of microelectronic device attachment bond pads.

10. The method of claim 1 , wherein attaching a microelectronic device to the plurality of microelectronic device attachment bond pads comprises forming conductive filled epoxy interconnects between microelectronic device to the plurality of microelectronic device attachment bond pads.

11. The method of claim 1 , wherein forming the mold chase having the mold body and the at least one projection extending from the mold body, wherein the at least one projection includes the at least one sidewall and the contact surface comprises the at least one projection extending from a first surface of the mold body, wherein the contact surface is substantially parallel to the mold body first surface.

12. The method of claim 1 , wherein the portion of the at least one mold chase projection comprises a material selected from the group consisting from butyl rubbers, ethylene rubber, and fluoropolymer elastomers.

13. The method of claim 1 , wherein disposing the mold material between the microelectronic substrate and the mold chase comprises disposing an epoxy resin mold material between the microelectronic substrate and the mold chase.

14. The method of claim 2 , wherein filling the at least one interconnection via with the conductive material to form the through-mold interconnection comprises filling the at least one interconnection via with solder to form the through-mold interconnection.

Assignees

• Karhade Omkar G
• Deshpande Nitin A
• Cetegen Edvin
• Li Eric J
• Mallik Debendra
• Ziadeh Bassam M
• Intel Corp

Inventors

• Karhade Omkar G
• Deshpande Nitin A
• Cetegen Edvin
• Li Eric J
• Mallik Debendra
• Ziadeh Bassam M

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W74/10

  characterised by their shape or disposition · CPC title