Residual material detection in backdrilled stubs

US9739825B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9739825-B2
Application numberUS-201615205617-A
CountryUS
Kind codeB2
Filing dateJul 8, 2016
Priority dateMay 20, 2014
Publication dateAug 22, 2017
Grant dateAug 22, 2017

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capacitance measurement to exceed the predetermined baseline capacitance measurement. An indication is made that the predetermined baseline capacitance measurement has been exceeded.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for measuring and assessing the adequacy of a backdrilling operation, the method comprising: obtaining a test capacitance measurement of a backdrilled stub of a via formed in a printed circuit board; comparing the test capacitance measurement to a baseline capacitance measurement, residual conductive plating material in the backdrilled stub causing the test capacitance measurement to exceed the baseline capacitance measurement; and indicating that the test capacitance measurement exceeds the baseline capacitance measurement. 2. The method of claim 1 , wherein the obtaining the test capacitance measurement is performed using a capacitance probe. 3. The method of claim 2 further comprising: prior to the using the capacitance probe to obtain the test capacitance measurement, positioning the capacitance probe within the via. 4. The method of claim 1 , wherein the baseline capacitance measurement is a predetermined baseline capacitance measurement. 5. The method of claim 1 , further comprising: in response to the indicating that the test capacitance measurement exceeds the baseline capacitance measurement, re-drilling the stub. 6. The method of claim 1 , further comprising: adjusting the baseline capacitance measurement based on the sensitivity of an interface with which the via is intended to be associated. 7. A system for measuring and assessing the adequacy of a backdrilling operation, the system comprising: a capacitance probe deployment device; and a computer operatively coupled to the capacitance probe deployment device, the computer configured to: instruct the capacitance probe deployment device to use a capacitance probe to obtain a test capacitance measurement of a backdrilled stub of a via formed in a printed circuit board; compare the test capacitance measurement to a baseline capacitance measurement, the residual conductive plating material in the backdrilled stub causing the test capacitance measurement to exceed the baseline capacitance measurement; and indicate that the test capacitance measurement exceeds the baseline capacitance measurement. 8. The system of claim 7 , wherein the computer is further configured to: prior to the capacitance probe obtaining the test capacitance measurement, instruct the capacitance probe deployment device to position the capacitance probe with the via. 9. The system of claim 8 , wherein the baseline capacitance measurement is a predetermined baseline capacitance measurement. 10. The system of claim 7 , wherein the indicating that the test capacitance measurement exceeds the baseline capacitance measurement includes instructing a drill device to re-drill the stub. 11. The system of claim 7 , wherein the computer is further configured to: adjust the baseline capacitance measurement based on the sensitivity of an interface with which the via is intended to be associated. 12. A computer program product for measuring and assessing the adequacy of a backdrilling operation, the computer program product comprising a computer readable storage medium having instructions embodied therewith, the instructions executable by a computer to cause the computer to: instruct a capacitance probe deployment device to use a capacitance probe to obtain a test capacitance measurement of a backdrilled stub of a via formed in a printed circuit board; compare the test capacitance measurement to a baseline capacitance measurement, the residual conductive plating material in the backdrilled stub causing the test capacitance measurement to exceed the baseline capacitance measurement; and indicate that the test capacitance measurement exceeds the baseline capacitance measurement. 13. The computer program product of claim 12 , wherein the instructions are further executable by the computer to cause the computer to: prior to the capacitance probe obtaining the test capacitance measurement, instruct the capacitance probe deployment device to position the capacitance probe within the via. 14. The computer program product of claim 13 , wherein the baseline capacitance measurement is a predetermined baseline capacitance measurement. 15. The computer program product of claim 12 , wherein the indicating that the test capacitance measurement exceeds the baseline capacitance measurement includes instructing a drill device to re-drill the stub. 16. The computer program product of claim 12 , wherein the instructions are further executable by the computer to cause the computer to: adjust the baseline capacitance measurement based on the sensitivity of an interface with which the via is intended to be associated.

Assignees

Inventors

Classifications

  • Measuring capacitance (capacitive sensors G01D5/24) · CPC title

  • Testing of electronic circuits, e.g. by signal tracer ({EMC, EMP or similar testing of electronic circuits G01R31/002;} testing for short-circuits, discontinuities, leakage or incorrect line connection G01R31/50; checking computers {or computer components} G06F11/00; checking static stores for correct operation G11C29/00 {; testing receivers or transmitters of transmission systems H04B17/00}) · CPC title

  • H05K3/0047Primary

    Drilling of holes · CPC title

  • Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP] (G01R31/318508 takes precedence; contactless testing G01R31/302; testing contacts or connections G01R31/66) · CPC title

  • related to vias or transitions between vias and transmission lines · CPC title

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What does patent US9739825B2 cover?
A stub of a via formed in a printed circuit board is backdrilled to a predetermined depth. A capacitance probe is positioned within the via. Then the capacitance probe is used to obtain a test capacitance measurement. The test capacitance measurement is compared to a predetermined baseline capacitance measurement. Residual conductive plating material in the backdrilled stub causes the test capa…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H05K3/0047. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 22 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).