Printed wiring board

US9736945B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9736945-B2
Application numberUS-201514813218-A
CountryUS
Kind codeB2
Filing dateJul 30, 2015
Priority dateJul 30, 2014
Publication dateAug 15, 2017
Grant dateAug 15, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed wiring board includes an insulation layer, conductive pads formed on the insulation layer and positioned to connect an electronic component, and a conductive wiring pattern including first and second conductive patterns and formed on the insulation layer such that the conductive wiring pattern is extending between the conductive pads. The first pattern includes first wiring lines, the second pattern includes second wiring lines, the first and second conductive patterns are formed such that the first wiring lines and the second wiring lines are alternately arrayed on the insulation layer, each of the first wiring lines includes a first metal layer formed on an interface with the insulation layer, each of the second wiring lines includes a second metal layer formed on an interface with the insulation layer, and the first metal layer includes a metal material which is different from a metal material forming the second metal layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed wiring board, comprising: an insulation layer comprising an insulative material; a plurality of conductive pads formed on the insulation layer such that the plurality of conductive pads is positioned to connect an electronic component; and a conductive wiring pattern comprising a first conductive pattern and a second conductive pattern and formed on the insulation layer such that the conductive wiring pattern is extending between the conductive pads, the first conductive pattern comprising a plurality of first wiring lines, the second conductive pattern comprising a plurality of second wiring lines, wherein the first conductive pattern and the second conductive pattern are formed such that the first wiring lines and the second wiring lines are alternately arrayed on the insulation layer, each of the first wiring lines comprises a first metal layer formed on an interface with the insulation layer, each of the second wiring lines comprises a second metal layer formed on an interface with the insulation layer, and the first metal layer comprises a metal material which is different from a metal material forming the second metal layer. 2. The printed wiring board according to claim 1 , wherein the first metal layer is a layer comprising copper, and the second metal layer is a layer comprising at least one of titanium, a titanium compound and nickel. 3. The printed wiring board according to claim 2 , wherein the first metal layer is an electroless plating metal layer, and the second metal layer is a sputtered metal layer. 4. The printed wiring board according to claim 3 , wherein each of the second wiring lines comprises a first copper layer sputtered on the second metal layer, and a second copper layer electrolytically plated on the first copper layer. 5. The printed wiring board according to claim 1 , wherein each of the first wiring lines has a line width in a range of from 1 μm to 5 μm, and each of the second wiring lines has a line width in a range of from 1 μm to 5 μm. 6. The printed wiring board according to claim 1 , wherein the first wiring lines and the second wiring lines are arrayed such that a line space between the first wiring lines and the second wiring lines is in a range of from 1 μm to 5 μm. 7. The printed wiring board according to claim 1 , wherein each of the first wiring lines has a thickness in a range of 70% to 130% of a thickness of a base wiring line, and each of the second wiring lines has a thickness in a range of 70% to 130% of a thickness of a base wiring line. 8. The printed wiring board according to claim 1 , wherein the insulative material of the insulation layer comprises an epoxy resin material and an inorganic filler material contained in the epoxy resin material in an amount of 30 mass % to 80 mass %. 9. The printed wiring board according to claim 1 , wherein the insulative material of the insulation layer comprises a photosensitive resin. 10. The printed wiring board according to claim 1 , wherein the conductive wiring pattern is forming a portion of an outermost conductive layer. 11. The printed wiring board according to claim 10 , wherein the conductive wiring pattern is formed such that an upper surface of the conductive wiring pattern and an upper surface of the conductive pads form a same plane. 12. The printed wiring board according to claim 10 , wherein the conductive wiring pattern is formed such that a space between the conductive wiring pattern and the conductive pads is in a range of 5 μm to 15 μm. 13. The printed wiring board according to claim 1 , further comprising: an inner conductive layer formed on the insulation layer on an opposite side with respect to the conductive wiring pattern such that the insulation layer is interposed between the conductive wiring pattern and the inner conductive layer. 14. The printed wiring board according to claim 13 , wherein the inner conductive layer comprises a planar conductive layer extending in an array direction of the conductive wiring pattern. 15. The printed wiring board according to claim 14 , further comprising: a grounding layer, wherein the planar conductive layer is electrically connected to the grounding layer. 16. The printed wiring board according to claim 1 , wherein the first metal layer is an electroless plating metal layer, and the second metal layer is a sputtered metal layer. 17. The printed wiring board according to claim 1 , wherein each of the second wiring lines comprises a first copper layer sputtered on the second metal layer, and a second copper layer electrolytically plated on the first copper layer. 18. The printed wiring board according to claim 2 , wherein each of the first wiring lines has a line width in a range of from 1 μm to 5 μm, and each of the second wiring lines has a line width in a range of from 1 μm to 5 μm. 19. The printed wiring board according to claim 18 , wherein the first wiring lines and the second wiring lines are arrayed such that a line space between the first wiring lines and the second wiring lines is in a range of from 1 μm to 5 μm. 20. The printed wiring board according to claim 2 , wherein each of the first wiring lines has a thickness in a range of 70% to 130% of a thickness of a base wiring line, and each of the second wiring lines has a thickness in a range of 70% to 130% of a thickness of a base wiring line.

Assignees

Inventors

Classifications

  • Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads · CPC title

  • Using different types of conductors · CPC title

  • One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters (H05K1/142 and H05K1/147 take precedence) · CPC title

  • Surface contacts, e.g. bumps (H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3465) · CPC title

  • Pads for surface mounting, e.g. lay-out · CPC title

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Frequently asked questions

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What does patent US9736945B2 cover?
A printed wiring board includes an insulation layer, conductive pads formed on the insulation layer and positioned to connect an electronic component, and a conductive wiring pattern including first and second conductive patterns and formed on the insulation layer such that the conductive wiring pattern is extending between the conductive pads. The first pattern includes first wiring lines, the…
Who is the assignee on this patent?
Ibiden Co Ltd
What technology area does this patent fall under?
Primary CPC classification H05K3/18. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 15 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).