Optoelectronic device and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-9728679-B2
Application number	US-201514971046-A
Country	US
Kind code	B2
Filing date	Dec 16, 2015
Priority date	Oct 26, 2012
Publication date	Aug 8, 2017
Grant date	Aug 8, 2017

Abstract

An optoelectronic device comprises a substrate; pads on a surface of the substrate; semiconductor elements, each element resting on a pad; a portion covering at least the lateral sides of each pad, the portion preventing the growth of the semiconductor elements on the lateral sides; and a dielectric region extending in the substrate from the surface and connecting, for each pair of pads, one of the pads in the pair to the other pad in the pair. A method of manufacturing an optoelectronic device is also disclosed.

First claim

What is claimed is:

1. An optoelectronic device comprising:
a substrate;
pads on a surface of the substrate;
semiconductor elements, each element resting on a pad;
a protection portion covering at least the lateral sides of each pad, said protection portion preventing growth of the semiconductor elements on the lateral sides; and
a dielectric region extending in the substrate from said surface and connecting, for each pair of pads, one of the pads in the pair of pads to the other pad in the pair of pads.

2. The optoelectronic device of claim 1 , wherein the substrate is made of a first semiconductor material selected from the group comprising silicon, germanium, silicon carbide, a III-V compound, a II-VI compound, and a combination of these compounds.

3. The optoelectronic device of claim 2 , wherein each semiconductor element comprises at least a portion mainly comprising a second semiconductor material in contact with one of the pads, the second semiconductor material being selected from the group comprising silicon, germanium, silicon carbide, a III-V compound, a II-VI compound, and a combination of these compounds.

4. The optoelectronic device of claim 1 , wherein a thickness of each pad is in a range from 1 nm to 100 nm and wherein the substrate is in electric contact with each pad.

5. The optoelectronic device of claim 1 , wherein each semiconductor element is a microwire, a nanowire, a conical element, or a tapered element.

6. The optoelectronic device of claim 1 , wherein the protection portion is made of an insulating material.

7. A method of manufacturing an optoelectronic device comprising the successive steps of:
providing a substrate;
forming pads on a surface of the substrate;
forming a protection portion covering at least the lateral sides of each pad and forming a dielectric region extending in the substrate from said surface and connecting, for each pair of pads, one of the pads in the pair of pads to the other pad in the pair of pads; and
forming semiconductor elements, each element resting on a pad, said protection portion comprising a material preventing growth of the semiconductor elements on the lateral sides.

8. The method of claim 7 , wherein the protection portion is made of an insulating material.

9. The method of claim 7 , wherein the region is formed by oxidation or nitriding of the substrate.

10. The method of claim 9 , comprising the successive steps of:
depositing a layer on the substrate;
forming insulating blocks on the layer;
etching the portions of the layer which are not covered with the insulating blocks to form the pads;
oxidizing the sides of the pads and the substrate portions which are not covered with the pads; and
removing the insulating blocks.

11. The method of claim 9 , comprising the successive steps of:
depositing a layer on the substrate;
forming insulating blocks on the layer;
etching the portions of the layer which are not covered with the insulating blocks to form the pads;
removing the insulating blocks;
depositing a dielectric layer covering the pads and the substrate between the pads;
anisotropically etching the dielectric layer to remove the dielectric layer from the substrate and from the top of the pads and leave portions of the dielectric layer on the lateral sides; and
nitriding the substrate portions which are not covered with the pads.

12. The method of claim 11 , further comprising nitriding a top of each pad.

13. A method of manufacturing an optoelectronic device comprising the steps of:
providing a substrate;
depositing a layer on the substrate;
forming insulating blocks on the layer;
etching the portions of the layer which are not covered with the insulating blocks to form pads on a surface of the substrate;
removing the insulating blocks;
forming a protection portion covering at least the lateral sides of each pad and forming a dielectric region extending in the substrate from said surface and connecting, for each pair of pads, one of the pads in the pair of pads to the other pad in the pair of pads; and
forming semiconductor elements, each element resting on a corresponding pad, said protection portion comprising a material preventing growth of the semiconductor elements on the lateral sides of the corresponding pad;
oxidizing the sides of the pads and the substrate portions which are not covered with the pads.

14. The method of claim 13 , comprising the successive steps of:
depositing a layer on the substrate;
forming insulating blocks on the layer;
etching the portions of the layer which are not covered with the insulating blocks to form the pads;
removing the insulating blocks;
depositing a dielectric layer covering the pads and the substrate between the pads;
anisotropically etching the dielectric layer to remove the dielectric layer from the substrate and from the top of the pads and leave portions of the dielectric layer on the lateral sides; and
nitriding the substrate portions which are not covered with the pads.

15. The method of claim 13 , further comprising nitriding a top of each pad.

Assignees

• Aledia
• Commissariat Á L'Energie Atomique Et Aux Energies Alternatives
• Commissariat A L'Energie Atomique Et Aux Energies

Inventors

• Dechoux Nathalie
• Amstatt Benoit
• Gilet Philippe

Classifications

• H10P14/3462

  Nanowires · CPC title

• H10P14/3416

  Nitrides · CPC title

• H10P14/3216

  Nitrides · CPC title

• H10P14/2905

  Silicon, silicon germanium or germanium · CPC title

• H10P14/271

  characterised by the preparation of substrate for selective deposition · CPC title