Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
US9728487B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9728487-B2 |
| Application number | US-201615095033-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 9, 2016 |
| Priority date | May 19, 2015 |
| Publication date | Aug 8, 2017 |
| Grant date | Aug 8, 2017 |
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Official abstract text for this publication.
An object of the present invention is to improve the reliability of a semiconductor device having an imaging function. A semiconductor device includes a package having a cavity and terminals (TE 1 ), a semiconductor chip that has an imaging unit and is arranged in the cavity, and a cap material with which the cavity is sealed and which has translucency. In addition, the semiconductor device includes a mounting board that has a through-hole and terminals (TE 2 ) and is arranged so as to electrically couple the terminals (TE 1 ) to the terminals (TE 2 ), a heat transfer member that is inserted into the through-hole and is coupled to the package, and a heat sink coupled to the heat transfer member.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: an insulating base material having a first upper surface and a first lower surface positioned on the opposite side of the first upper surface, a cavity on the first upper surface, and first terminals on the first lower surface; a semiconductor chip having a first top surface and a first back surface positioned on the opposite side of the first top surface, and an imaging unit on the first top surface side, and arranged in the cavity; a cap member sealing the cavity and having translucency; a mounting board having a second upper surface and a second lower surface positioned on the opposite side of the second upper surface, a through-hole, and second terminals on the second upper surface, and arranged in such a manner that the first terminals and the second terminals are electrically coupled to each other while allowing the first lower surface of the insulating base material to face the second upper surface; a heat transfer member inserted into the through-hole, and coupled to the insulating base material; and a heat radiation member arranged on the second lower surface side of the mounting board, and coupled to the heat transfer member, wherein first reinforcing terminals are provided at positions outside the arranged positions of the first terminals on the first lower surface of the insulating base material, and wherein second reinforcing terminals are provided at positions outside the arranged positions of the second terminals on the second lower surface of the mounting board. 2. The semiconductor device according to claim 1 , wherein the width of the through-hole is larger than that of the imaging unit in cross section. 3. The semiconductor device according to claim 1 , wherein the width of the through-hole is larger than that of the semiconductor chip in cross section. 4. The semiconductor device according to claim 1 , wherein the first terminals are present, wherein the second terminals are present, and wherein the second terminals surround the through-hole in planar view. 5. The semiconductor device according to claim 1 , wherein the thickness of the heat transfer member is larger than that of the mounting board. 6. The semiconductor device according to claim 1 , wherein the insulating base material is a ceramic board. 7. The semiconductor device according to claim 1 , wherein a package structure including the insulating base material, the semiconductor chip, and the cap member is an LGA. 8. The semiconductor device according to claim 1 , wherein the size of each second reinforcing terminal is larger than that of each second terminal. 9. The semiconductor device according to claim 1 , wherein the size of each second reinforcing terminal is larger than that of each first reinforcing terminal, and wherein a part of each second reinforcing terminal is exposed from the insulating base material in cross section. 10. The semiconductor device according to claim 1 , wherein a side fill is formed from a part of the second upper surface of the mounting board to a part of the side surface of the insulating base material. 11. The semiconductor device according to claim 1 , wherein the heat radiation member is mechanically fixed to the second lower surface of the mounting board. 12. The semiconductor device according to claim 11 , wherein a pair of hooks diagonally fixed and arranged relative to the center of the heat radiation member is provided on the second lower surface of the mounting board, and wherein the heat radiation member is fixed by a fixing member that presses the heat radiation member against the heat transfer member and is coupled to the pair of hooks. 13. The semiconductor device according to claim 1 , wherein notch parts coupled to the first reinforcing terminals are provided on side surfaces of the insulating base material, and wherein a conductive film is formed at, at least, apart of the inner wall of each notch part. 14. The semiconductor device according to claim 13 , wherein a solder fillet is formed at, at least, a part of the inner wall of each notch part.
comprising holes having chips therein · CPC title
having interconnections in passages through the insulating or insulated base · CPC title
on sidewalls or bottom surfaces of the package substrates, interposers or redistribution layers · CPC title
Snap-on arrangements, e.g. clips · CPC title
comprising Peltier coolers · CPC title
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