Address learning and aging for network bridging in a network processor

Patent metadata

Field	Value
Publication number	US-9727508-B2
Application number	US-201213705822-A
Country	US
Kind code	B2
Filing date	Dec 5, 2012
Priority date	Apr 27, 2009
Publication date	Aug 8, 2017
Grant date	Aug 8, 2017

Abstract

Described embodiments process data packets received that include a source address and at least one destination address. If the destination address is stored in a memory of an I/O adapter, the received data packet is processed in accordance with bridging rules associated with each destination address stored in the I/O adapter memory. If the destination address is not stored in the I/O adapter memory, the I/O adapter sends a task message to a processor to determine whether the destination address is stored in an address table stored in a shared memory of the network processor. The I/O adapter memory has lower access latency than the address table. If the destination address is stored in the address table, the received data packet is processed in accordance with bridging rules stored in the address table and the bridging rules stored in the I/O adapter memory are updated.

First claim

We claim:

1. A method of processing data packets received by a network processor comprising a plurality of processing modules and at least one shared memory, the method comprising:
receiving a data packet by the network processor, the data packet including an associated source address and at least one associated destination address;
determining, by an I/O adapter of the network processor, whether the at least one associated destination address is stored in a memory of the I/O ad…

Assignees

• Lsi Corp
• Intel Corp

Inventors

• Munoz Robert J
• Manzella Joseph A
• Guo Zhong
• Roper Walter A

Classifications

• G06F15/167

  Physics · mapped topic

• H04L49/109

  Electricity · mapped topic

• H04L47/2441

  Electricity · mapped topic

• H04L49/506

  Electricity · mapped topic

• G06F13/385 Primary

  Physics · mapped topic