Multichip automotive radar system, a radar chip for such a system, and a method of operating such a system

US9726756B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9726756-B2
Application numberUS-201414539381-A
CountryUS
Kind codeB2
Filing dateNov 12, 2014
Priority dateDec 3, 2013
Publication dateAug 8, 2017
Grant dateAug 8, 2017

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multichip radar system is disclosed, comprising a plurality of configurable ICs, and a digital interface therebetween, each configurable IC being configurable to operate as a master IC and as a slave IC. The configurable ICs may be similar or identical, and have an allocated measurement range. Each configurable IC comprises: a down-converter; an ADC; a digital signal processor; and a transmitter to transmit a radar signal. One is configured as a master IC and to transmit a radar signal and each of the other configurable ICs to operate as a slave IC. Each configurable IC is adapted to use a common Local Oscillator signal, a common clock signal, and a common timing signal for determining at least the start of the common sampling window. A method of operating such a multichip radar system is also disclosed, as is a configurable IC or radar IC suitable for such a system.

First claim

Opening claim text (preview).

The invention claimed is: 1. A multichip radar system, comprising a plurality of configurable ICs, and a digital interface therebetween, each configurable IC being configurable to operate as a master IC and as a slave IC, and to have an allocated measurement range; wherein each configurable IC comprises: a down-converter adapted to down-convert a respective reflected radar signal; an ADC adapted to convert the respective down-converted signal to a respective digital signal for a common sampling window to accumulate respective digital data; a digital signal processor adapted to divide the respective digital data between a plurality of measurement ranges, the digital signal processor being further adapted to receive digital data corresponding to the IC's allocated measurement range from each of the other ICs, to send digital data corresponding to each other allocated measurement range to the respective other IC, and to process the digital data in its allocated measurement range; and a transmitter adapted to transmit a radar signal; wherein a one of the configurable ICs is configured to operate as a master IC and is configured to transmit a radar signal and each of the other configurable ICs is configured to operate as a slave IC; and wherein each configurable IC is adapted to use a common Local Oscillator signal, a common clock signal, and a common timing signal for determining at least the start of the common sampling window. 2. A multichip radar system as claimed in claim 1 , wherein each configurable IC further comprises: a Local Oscillator generator for generating a Local Oscillator signal; a clock generator for generating a clock signal; and a timing signal generator for generating a timing signal; and wherein the Local Oscillator signal of the master IC is the common Local Oscillator signal, the clock signal of the master IC is the common clock signal and the timing signal generated of the master IC is the common timing signal. 3. A multichip radar system as claimed in claim 2 , wherein each configurable IC further comprises a local oscillator input switch and a local oscillator output switch, a clock input switch and a clock output switch, and a timing signal input switch and a timing signal output switch, wherein the master IC is configured to output the common local oscillator signal, the common clock signal and the common timing signal, and wherein the one or more slave ICs are each configured to input the common local oscillator signal, the common clock signal and the common timing signal. 4. A multichip radar system as claimed in claim 1 , configured such that the master IC transmits the radar signal resulting in the respective reflected radar signals. 5. A multichip radar system as claimed in claim 1 , adapted to transmit multiple chirps, and further adapted to, between two successive chirps, both reconfigure the master IC to become a slave IC and reconfigure a slave IC to become the master IC. 6. An intelligent automobile control system comprising a multichip radar system as claimed in claim 1 , and a data-processing system configured as at least one of an electronic brake assist system, a blindspot detection system, a rear cross traffic alert system, and a cruise control system. 7. A configurable IC adapted for use, both as a master IC and as a slave IC, in a multichip radar system as claimed in claim 1 , and adapted to use an external Local Oscillator signal, an external common clock signal, and an external common timing signal for determining at least the start of the sampling window. 8. A configurable IC adapted for use both as a master IC and as a slave IC, in a multichip radar system as claimed in claim 2 . 9. A method of operating a multichip radar system comprising a plurality of configurable ICs, the method comprising: allocating one of the configurable ICs as a master IC and the remainder of the configurable ICs as slave ICs; allocating a measurement range to each of the configurable ICs; operating each configurable IC using a common Local Oscillator signal, a common clock signal, and a common timing signal for determining a common sampling window; the master IC transmitting a radar signal; each configurable IC down-converting a respective reflected radar signal; each configurable IC converting the respective down-converted signal, by means of an ADC, to a respective digital signal for the common sampling window to accumulate respective digital data; each configurable IC dividing the respective digital data between a plurality of measurement ranges; each configurable IC receiving digital data corresponding to the IC's allocated measurement range from each of the other ICs; each configurable IC sending digital data corresponding to each other allocated measurement range to the respective other IC; each configurable IC processing the digital data in its allocated measurement range; and each slave IC sending the respective result from the digital data processing to the master IC. 10. The method of claim 9 , further comprising the master IC generating the common Local Oscillator signal, the common clock signal, and the common timing signal. 11. The method of claim 9 , wherein the radar signal is a chirp, the method further comprising transmitting a plurality of chirps. 12. The method of claim 9 , further comprising, between successive chirps, both reconfiguring the master IC to become a slave IC and reconfiguring a slave IC to become the master IC. 13. The method of claim 9 , wherein the measurement ranges relate to a single dimension and dividing the respective digital data between a plurality of measurement ranges is effected by means of a fast Fourier transform into that dimension. 14. The method of any of claim 9 , wherein the measurement ranges relate to two dimensions, and the dividing the respective digital data between a plurality of measurement ranges is effected by means of a two-dimensional fast Fourier transform into those two dimensions. 15. The method of claim 10 , wherein each configurable IC comprises at least one of at least two transmit antennas and at least two receive antennas, and the method further comprises at least one of selecting a transmit antenna of the master IC to transmit the radar signal, and selecting a receive antenna for each of the configurable ICs to receive the respective reflected radar signal.

Assignees

Inventors

Classifications

  • Combinations of radar systems, e.g. primary radar and secondary radar · CPC title

  • Bistatic radar systems; Multistatic radar systems · CPC title

  • of land vehicles · CPC title

  • Transmission of data between radar, sonar or lidar systems and remote stations · CPC title

  • using sawtooth modulation · CPC title

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What does patent US9726756B2 cover?
A multichip radar system is disclosed, comprising a plurality of configurable ICs, and a digital interface therebetween, each configurable IC being configurable to operate as a master IC and as a slave IC. The configurable ICs may be similar or identical, and have an allocated measurement range. Each configurable IC comprises: a down-converter; an ADC; a digital signal processor; and a transmit…
Who is the assignee on this patent?
Nxp Bv
What technology area does this patent fall under?
Primary CPC classification G01S7/032. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 08 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).