Method for fabricating a flexible electronic structure and a flexible electronic structure

Patent metadata

Field	Value
Publication number	US-9723711-B2
Application number	US-201514819040-A
Country	US
Kind code	B2
Filing date	Aug 5, 2015
Priority date	May 27, 2011
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

Flexible electronic structure and methods for fabricating flexible electronic structures are provided. An example method includes applying a first layer to a substrate, creating a plurality of vias through the first layer to the substrate, and applying a second polymer layer to the first layer such that the second polymer forms anchors contacting at least a portion of the substrate. At least one electronic device layer is disposed on a portion of the second polymer layer. At least one trench is formed through the second polymer layer to expose at least a portion of the first layer. At least a portion of the first layer is removed by exposing the structure to a selective etchant to providing a flexible electronic structure that is in contact with the substrate. The electronic structure can be released from the substrate.

First claim

The invention claimed is:

1. A method for fabricating a flexible electronic structure, said method comprising:
applying a first layer to a portion of a substrate;
removing selected portions of the first layer to provide a plurality of vias, wherein a portion of the vias extend substantially to a surface of the substrate;
disposing a second polymer layer, such that portions of the second polymer layer conform to a dimension of at least one of the plurality of vias and forms a plurality of anchors that contact at least a portion of the substrate, wherein the second polymer layer is more resistant to a selective etchant than the first layer;
disposing at least one electronic device layer above a portion of the first layer and/or the second polymer layer;
applying an adhesive layer to a portion of the second polymer layer prior to disposing the at least one electronic device layer;
forming at least one trench through the second polymer layer and the at least one electronic device layer to expose at least a portion of the first layer;
exposing at least a portion of the first layer to the selective etchant through the at least one trench; and
removing, by the selective etchant, portions of the first layer, thereby providing the flexible electronic structure, wherein at least one anchor of the plurality of anchors remains in contact with at least a portion of the substrate.

2. The method of claim 1 , wherein an average width of the vias is selected such that at least some of the plurality of anchors resist the selective etchant to remain substantially in contact with at least a portion of the substrate.

3. The method of claim 1 , further comprising:
applying a removable medium to a portion of the at least one electronic device layer; and
applying a force to separate the flexible electronic structure from the substrate;
wherein the removable medium is selected such that the adhesion strength of the removable medium to the at least one electronic device layer is greater than the adhesion strength of the anchors to the substrate.

4. The method of claim 1 , wherein an average width of the plurality of anchors is in a range from about 10 μm to about 50 μm.

5. The method of claim 1 , wherein an average width of the plurality of anchors is in a range from about 0.1 μm to about 1000 μm.

6. The method of claim 1 , wherein at least some of the plurality of anchors have a substantially circular cross-section.

7. The method of claim 1 , wherein at least some of the plurality of anchors have a substantially hexagonal cross-section, a substantially oval cross-section, a substantially rectangular cross-section, a polygonal cross-section, or a non-polygonal cross-section.

8. The method of claim 1 , wherein the plurality of anchors are formed in a two-dimensional array.

9. The method of claim 1 , wherein an average width of each of the plurality of vias is in a range from about 10 μm to about 50 μm.

10. The method of claim 1 , wherein an average width of each of the plurality of vias is in a range from about 0.1 μm to about 1000 μm.

11. The method of claim 1 , wherein respective ones of the plurality of vias are spaced apart by an average separation ranging from about 50 μm to about 1,000 μm.

12. The method of claim 1 , wherein respective ones of the plurality of vias are spaced apart by an average separation ranging from about 0.2 μm to about 10,000 μm.

13. The method of claim 1 , wherein respective ones of the plurality of vias are spaced apart by an average separation ranging from about 200 μm to about 800 μm.

14. The method of claim 1 , wherein the first layer comprises polymethylmethacrylate, silicon dioxide, chromium, or titanium.

15. The method of claim 1 , wherein the second polymer layer comprises polyimide, polyethylene naphthalate, polybenzobisoxazole, benzocyclobutene, siloxane, or a liquid crystal polymer.

16. The method of claim 1 , wherein the first layer comprises polymethylmethacrylate and the selective etchant comprises acetone.

17. The method of claim 1 , wherein the first layer comprises silicon dioxide and the selective etchant comprises hydroflouric acid.

18. The method of claim 1 , wherein the first layer comprises chromium and the selective etchant comprises cerric ammonium nitrate.

19. The method of claim 1 , wherein the first layer comprises titanium and the selective etchant comprises hydroflouric acid or hydrochloric acid.

20. The method of claim 1 , wherein the substrate comprises at least one of a test structure, a manufacturing alignment structure, a piezoelectric structure, and a lithography alignment mark.

21. The method of claim 1 , wherein the adhesive is a polyimide or other polymer.

22. The method of claim 1 , further comprising curing the adhesive layer prior to disposing the at least one electronic device layer.

23. The method of claim 1 , wherein the at least one electronic device layer comprises at least one of a metal, a semiconductor, and a dielectric.

24. The method of claim 1 , further comprising curing the first layer at a cure temperature of the second polymer layer prior to applying the second polymer layer, wherein the cure temperature of the second polymer layer is higher than a cure temperature of the first layer.

25. The method of claim 1 , further comprising patterning a mask on the at least one electronic device layer prior to forming the at least one trench, wherein the mask forms a pattern of the at least one trench.

26. The method of claim 1 , further comprising removing selected portions of the first layer using an oxygen plasma etch.

27. The method of claim 1 , wherein the at least one trench is formed by using lithography and etching, using laser ablation, by mechanical cutting or using pure photopatterning.

28. The method of claim 1 , further comprising:
applying a third polymer layer to at least a portion of the at least one electronic device layer; and
forming the at least one trench through the third polymer layer, the second polymer layer, and the at least one electronic device layer to expose at least a portion of the first layer.

29. The method of claim 28 , wherein the third polymer layer is applied using a spin coating process, spray coating, lamination, casting, or vapor deposition.

30. The method of claim 28 , wherein a thickness of the third polymer layer is configured such that the at least one electronic device layer is at a neutral mechanical plane of the electronic structure.

31. The method of claim 1 , further comprising:
applying a removable medium to a portion of the at least one electronic device layer; and
applying a force to separate the flexible electronic structure from the substrate.

32. The method of claim 31 , further comprising removing the removable medium using selective removal process.

33. The method of claim 32 , wherein the selective removal process is exposure to a solvent, heating, exposure to UV light, or an oxygen plasma etch.

34. The method of claim 1 , wherein the substrate is a rigid substrate.

35. The method of claim 1 , wherein the substrate has a higher Young's modulus than the second polymer layer.

36. A flexible electronic structure comprising:
a second polymer layer having a first surface and a seco

Assignees

• Mc10 Inc

Inventors

• Elolampi Brian David
• Ghaffari Roozbeh
• De Graff Bassel
• Arora William J
• Hu Xiaolong

Classifications

• H10P72/7434

  used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate · CPC title

• H10P72/7426

  used as a support during build up manufacturing of active devices · CPC title

• H10P72/7412

  the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support · CPC title

• H10P72/744

  Details of chemical or physical process used for separating the auxiliary support from a device or a wafer · CPC title

• H10P72/74 Primary

  using temporarily an auxiliary support · CPC title