Image sensor manufacturing methods

Patent metadata

Field	Value
Publication number	US-9721984-B2
Application number	US-201213445766-A
Country	US
Kind code	B2
Filing date	Apr 12, 2012
Priority date	Apr 12, 2012
Publication date	Aug 1, 2017
Grant date	Aug 1, 2017

Abstract

Semiconductor devices and back side illumination (BSI) sensor manufacturing methods are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece and forming an integrated circuit on a front side of the workpiece. A grid of a conductive material is formed on a back side of the workpiece using a damascene process.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, the method comprising:
providing a workpiece, the workpiece having a front side and a back side opposite the front side;
forming a grid comprising a conductive material on the back side of the workpiece using a damascene process, the grid comprising a first region and a second region, the second region located along a perimeter outside of the first region, the first region comprising a grating of first members, wherein each of the first members has a first width, the second region comprising second members, wherein each of the second members has a second width, the second width greater than the first width; and
after forming the grid, forming an integrated circuit on the front side of the workpiece.

2. The method according to claim 1 , wherein forming the grid comprises forming a metal grid.

3. The method according to claim 2 , wherein forming the metal grid comprises forming a material selected from the group consisting essentially of W, Al, Cu, and combinations thereof.

4. The method according to claim 1 , wherein forming the first region of the grid comprises forming the first members of the conductive material that extend lengthwise in an x direction and a y direction in a bottom view of the workpiece.

5. The method according to claim 4 , wherein the first width of the first members is about 130 nm to 300 nm.

6. The method according to claim 4 , wherein the first members comprise a thickness in a cross-sectional view of about 3,000 Angstroms or less.

7. The method according to claim 1 , wherein forming the grid comprises forming an insulating material over the back side of the workpiece, patterning the insulating material with a plurality of patterns, and filling the plurality of patterns with a conductive material.

8. The method according to claim 7 , wherein the insulating material comprises a first insulating material, further comprising forming a second insulating material over the grid and the first insulating material, and wherein forming the grid comprises improving a uniformity of the second insulating material.

9. The method of claim 1 , further comprising forming an anti-reflective coating (ARC) over the back side of the workpiece.

10. A method of manufacturing a semiconductor device, the method comprising:
providing a workpiece, the workpiece having a front side and a back side opposite the front side;
forming an insulating material over the back side of the workpiece;
patterning the insulating material;
forming a conductive material over the patterned insulating material; and
removing the conductive material from over a top surface of the patterned insulating material, forming a grid of members, the grid of members comprising:
a first plurality of members comprising the conductive material within the patterned insulating material, each of the first plurality of members having substantially equal first widths; and
a second plurality of members around a perimeter of the first plurality of members, the second plurality of members comprising the conductive material within the patterned insulating material, each of the second plurality of members having substantially equal second widths, each of the second widths being greater than each of the first widths;

after forming the grid of members, forming an integrated circuit on the front side of the workpiece; and
forming a plurality of back side illumination sensors on the front side of the workpiece, the plurality of back side illumination sensors comprising:
a first set of back side illumination sensors, the first set aligned with the first plurality of members such that at least one back side illumination sensor in the first set is positioned to receive light from the back side of the semiconductor device through spaces in the first plurality of members; and
a second set of back side illumination sensors, the second set aligned with the second plurality of members such that the second plurality of members blocks light impinging on the back side of the semiconductor device to at least one back side illumination sensor in the second set.

11. The method according to claim 10 , wherein patterning the insulating material comprises depositing a layer of photoresist over the insulating material, patterning the layer of photoresist using lithography, using the layer of photoresist as an etch mask while portions of the insulating material are etched away, and removing the layer of photoresist.

12. The method according to claim 10 , wherein patterning the insulating material comprises directly patterning the insulating material.

13. The method according to claim 10 , wherein forming the insulating material comprises forming an oxide material, further comprising forming a passivation oxide over the grid of members and the oxide material.

14. The method of claim 10 , further comprising forming an anti-reflective coating (ARC) over the back side of the workpiece.

15. The method of claim 10 , wherein each of the first widths of the first plurality of members is about 130 nm to 300 nm.

16. A method of manufacturing a back side illumination (BSI) sensor, the method comprising:
providing a workpiece having a front side and a back side opposite the front side;
forming a first insulating material over the back side of the workpiece;
patterning the first insulating material, forming patterns in the first insulating material;
forming a metal over the first insulating material, filling the patterns in the first insulating material with the metal;
removing the metal from over a top surface of the first insulating material using a chemical-mechanical polishing (CMP) process, forming a grid of the metal comprising a plurality of intersecting members within the patterns in the first insulating material, the plurality of intersecting members comprising a first region and a second region, the second region comprising a border around the first region, the first region comprising first members having substantially equal first widths, the second region comprising second members having substantially equal second widths, each of the second widths being greater than each of the first widths;
discontinuing removing the metal from over the top surface of the first insulating material when an endpoint is detected;
forming a second insulating material over the first insulating material and the grid of the metal;
forming a color filter material over the second insulating material;
forming a lens material over the color filter material; and
after forming the grid, forming an integrated circuit comprising an array of back side illumination sensors on the front side of the workpiece, the array of back side illumination sensors superimposed from a plan view over substantially the same area as the grid, at least one of the array of back side illumination sensors being entirely within the second region from a plan view.

17. The method according to claim 16 , further comprising forming an anti-reflective coating (ARC) over the back side of the workpiece, and forming a third insulating material over the ARC, before forming the first insulating material.

18. The method according to claim 17 , wherein forming the third insulating material comprises forming a buffer oxide.

19. The method according to claim 16 , wherein detecting the endpoint comprises detecting a component of the first insulating material.

20. The method according to claim 19 , wherein detecting the endpoint comprises monitoring a slurry of th

Assignees

• Cheng Mu-Han
• Wei Kuo-Hsiu
• Chen Kei-Wei
• Wang Ying-Lang
• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Cheng Mu-Han
• Wei Kuo-Hsiu
• Chen Kei-Wei
• Wang Ying-Lang

Classifications

• H01L27/14687

  Electricity · mapped topic

• H01L27/1464

  Electricity · mapped topic

• H01L27/14623 Primary

  Electricity · mapped topic

• H10F39/199

  Back-illuminated image sensors · CPC title

• H10F39/026

  Wafer-level processing · CPC title