Data transmission between asynchronous environments

Patent metadata

Field	Value
Publication number	US-9712353-B2
Application number	US-201213632751-A
Country	US
Kind code	B2
Filing date	Oct 1, 2012
Priority date	Oct 1, 2012
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

A method and system is provided for allowing signals across electrical domains. The method includes applying a clock signal (of at least 1 GHz) to an electronic element in a location having first electrical properties. Data is output from the first electronic element; and received at a second electronic element located in a location having second electrical properties. The first and second electrical properties are different by either voltage and clock frequency.

First claim

What is claimed is:

1. A method of providing signals across electrical domains including:
applying a clock signal to a first electronic element in a first electrical domain, the clock signal having a frequency of at least 1 GHz;
outputting a data element from the first electronic element including supplying the data of the data element to a first switch that alternates sending data of the data element to each of at least two electrical paths;
receiving the data element at a second electronic element in a second electrical domain, the first and second electrical domains differing by a parameter selected from the group consisting of voltage and clock frequency;
obtaining the parameter of the second domain;
multiplexing the parameter of the second domain with the data of the data element; and
passing a result of the multiplexing through a level shifter.

2. The method of claim 1 , wherein the first and second domains differ by clock frequency such that the first domain uses a first clock frequency and the second domain uses a second clock frequency, both the first and second clock frequency being at least 1 GHz.

3. The method of claim 1 , wherein all of the at least two electrical paths provide for the data of the data element to be transmitted to the second electronic element.

4. The method of claim 1 , wherein each of the two electrical paths contain identical electrical elements such that each element in the first electrical path has an analogous element in the second electrical path and each element in the second electrical path has an analogous element in the first electrical path creating a one-to-one correspondence of elements between the first and second electrical paths.

5. The method of claim 1 , wherein receiving the data element at the second electronic element includes receiving the data of the data element from a second switch that alternates sending data of the data element from each of the at least two electrical paths.

6. The method of claim 1 , wherein the first switch alternates electrical paths each clock cycle.

7. A method of providing signals across electrical domains including:
applying a clock signal to a first electronic element in a first electrical domain;
outputting a data element from the first electronic element including supplying the data of the data element to a first switch that alternates sending data of the data element to each of at least two electrical paths to a second electrical domain, and
receiving the data element at a second electronic element in the second electrical domain, the first and second electrical domains differing by a parameter selected from the group consisting of voltage and clock frequency;
wherein:
a first path of the at least two electrical paths consists of a first set of components between the first switch and a second switch in the second domain,
a second path of the at least two electrical paths consists of a second set of components between the first switch and the second switch in the second domain,
each of the first and second set of components contain identical electrical elements such that each element in the first electrical path has an analogous element in the second electrical path and each element in the second electrical path has an analogous element in the first electrical path creating a one-to-one correspondence of elements between the first and second electrical paths, and
the first switch is only able to output data to paths that travel from the first domain to the second domain.

8. The method of claim 7 , wherein the first and second domains differ by clock frequency such that the first domain uses a first clock frequency and the second domain uses a second clock frequency, both the first and second clock frequency being at least 1 GHz.

9. The method of claim 7 , wherein all of the at least two electrical paths provide for the data of the data element to be transmitted to the second electronic element.

10. The method of claim 7 , wherein the second switch alternates sending data of the data element from each of the at least two electrical paths to the second electrical element.

Assignees

• Ati Technologies Ulc
• Advanced Micro Devices Inc

Inventors

• Sung Andy
• Lai Leon
• Wang Daniel

Classifications

• H04L7/005

  Correction by an elastic buffer · CPC title

• H04L27/00 Primary

  Modulated-carrier systems · CPC title

• G06F5/06 Primary

  for changing the speed of data flow, i.e. speed regularising {or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor (G06F7/78 takes precedence)} · CPC title