Current-mode power amplifier

US9712115B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9712115-B2
Application numberUS-201514950295-A
CountryUS
Kind codeB2
Filing dateNov 24, 2015
Priority dateNov 24, 2015
Publication dateJul 18, 2017
Grant dateJul 18, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.

First claim

Opening claim text (preview).

What is claimed is: 1. A current mirror, comprising: a first transistor including a drain terminal configured to receive a first radio frequency (RF) input; a second transistor including a source terminal coupled to a source terminal of the first transistor and a gate terminal coupled to a gate terminal of the first transistor; and an inductor, including a first terminal coupled to the gate terminal of the second transistor, the inductor configured to form a first inductive-capacitive (LC) resonant circuit with a gate capacitance of the second transistor. 2. The current mirror of claim 1 , wherein the second transistor is configured to generate an RF output current based, at least in part, on a first RF input current. 3. The current mirror of claim 1 , wherein the LC resonant circuit is configured to increase an input impedance of the second transistor near a resonant frequency of the LC resonant circuit. 4. The current mirror of claim 1 , further comprising: a variable current source configured to generate a first bias current for the first transistor based, at least in part, on a voltage envelope of an RF input signal. 5. The current mirror of claim 1 , further comprising: a first common-gate amplifier coupled to the first transistor to form a first cascode transistor pair; and a second common-gate amplifier coupled to the second transistor to form a second cascode transistor pair. 6. The current mirror of claim 1 , further comprising: a third transistor; and a fourth transistor including a source terminal coupled to a source terminal of the third transistor and a gate terminal coupled to a gate terminal of the third transistor and a second terminal of the inductor. 7. The current mirror of claim 6 , wherein: a drain terminal of the first transistor is configured to receive a first RF input current; and a drain terminal of the third transistor is configured to receive a second RF input current, wherein the first RF input current is a first signal of a differential signal pair and the second RF input current is a second signal of the differential signal pair. 8. A power amplifier, comprising: a driver amplifier configured to receive a radio frequency (RF) input signal and to generate a buffered RF input signal; a bias current controller, coupled to the driver amplifier, configured to generate a bias current based, at least in part, on the RF input signal; and a resonant current mirror output stage configured to amplify the buffered RF input signal based, at least in part, on the bias current, the resonant current mirror output stage comprising: a first transistor including a drain terminal configured to receive at least a portion of the buffered RF input signal; a second transistor including a source terminal coupled to a source terminal of the first transistor and a gate terminal coupled to a gate terminal of the first transistor; and an inductor, including a first terminal coupled to the gate terminal of the second transistor, the inductor configured to form an inductive-capacitive (LC) resonant circuit with a gate capacitance of the second transistor. 9. The power amplifier of claim 8 , wherein at least a portion of the buffered RF input signal is coupled to the gate terminal of the second transistor. 10. The power amplifier of claim 8 , further comprising: a first common-gate amplifier coupled to the first transistor to form a first cascode transistor pair; and a second common-gate amplifier coupled to the second transistor to form a second cascode transistor pair. 11. The power amplifier of claim 8 , wherein the second transistor is configured to generate an RF output signal based, at least in part, on at least a portion of the buffered RF input signal. 12. The power amplifier of claim 11 , further comprising: an antenna; and an output balun to couple the RF output signal to the antenna. 13. The power amplifier of claim 8 , wherein the buffered RF input signal is a current-mode signal. 14. The power amplifier of claim 8 , further comprising: a third transistor; and a fourth transistor including a source terminal coupled to a source terminal of the third transistor, and a gate terminal coupled to a gate terminal of the third transistor and a second terminal of the inductor. 15. A power amplifier comprising: a first cascode transistor pair configured to implement a first transfer function; a second cascode transistor pair, coupled to the first cascode transistor pair, configured to implement a second transfer function that is an inverse of the first transfer function; and an inductor, coupled to the first cascode transistor pair and the second cascode transistor pair, configured to form an inductive-capacitive (LC) resonant circuit with a gate capacitance of the first cascode transistor pair and a gate capacitance of the second cascode transistor pair. 16. The power amplifier of claim 15 , further comprising: a variable current source configured to generate a bias current for the first cascode transistor pair based, at least in part, on a voltage envelope of an RF input signal. 17. The power amplifier of claim 15 , wherein the LC resonant circuit is configured to increase an input impedance of the power amplifier near a resonant frequency of the LC resonant circuit. 18. A current mirror, comprising: a first transistor; a second transistor including a source terminal coupled to a source terminal of the first transistor and a gate terminal coupled to a gate terminal of the first transistor; a third transistor; a fourth transistor including a source terminal coupled to a source terminal of the third transistor and a gate terminal coupled to a gate terminal of the third transistor; and an inductor, including a first terminal coupled to the gate terminal of the second transistor and a second terminal coupled to the gate terminal of the fourth transistor, the inductor configured to form a first inductive-capacitive (LC) resonant circuit with a gate capacitance of the second transistor. 19. The current mirror of claim 18 , wherein: a drain terminal of the first transistor is configured to receive a first radio frequency (RF) input current; and a drain terminal of the third transistor is configured to receive a second RF input current, wherein the first RF input current is a first signal of a differential signal pair and the second RF input current is a second signal of the differential signal pair. 20. The current mirror of claim 18 , wherein the second transistor is configured to generate an RF output current based, at least in part, on a first RF input current. 21. The current mirror of claim 18 , wherein the LC resonant circuit is configured to increase an input impedance of the second transistor near a resonant frequency of the LC resonant circuit. 22. The current mirror of claim 18 , further comprising: a variable current source configured to generate a first bias current for the first transistor based, at least in part, on a voltage envelop of an RF input signal. 23. The current mirror of claim 18 , further comprising: a first common-gate amplifier coupled to the first transistor to form a first cascode transistor pair; and a second common-gate amplifier coupled to the second transistor to form a second cascode transistor pair.

Assignees

Inventors

Classifications

  • A balun, i.e. balanced to or from unbalanced converter, being present at the input of an amplifier · CPC title

  • with field-effect devices (H03F3/195 takes precedence) · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

  • H03F1/0205Primary

    in transistor amplifiers · CPC title

  • with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

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Frequently asked questions

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What does patent US9712115B2 cover?
A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacit…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/0205. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).