Self-healing technique for high frequency circuits

Patent metadata

Field	Value
Publication number	US-9325282-B2
Application number	US-201414176607-A
Country	US
Kind code	B2
Filing date	Feb 10, 2014
Priority date	Sep 8, 2009
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

A self-healing monolithic integrated includes an electronic circuit having a plurality of transistors. At least one sensor is disposed within and electrically coupled to the electronic circuit and configured to sense a performance metric of the electronic circuit. A plurality of actuators is disposed within the circuit. Each actuator of the plurality of actuators has electrically coupled to it a control terminal. The plurality of actuators is configured to perform a selected one of, electrically coupling at least one transistor of the plurality of transistors into the electronic circuit and electrically de-coupling at least one transistor of the plurality of transistors, in response to operation of one of the control terminals to improve the performance metric.

First claim

What is claimed is:

1. A self-healing monolithic integrated circuit, comprising:
an electronic circuit having a plurality of transistors, said electronic circuit disposed between and electrically coupled to at least one input terminal and at least one output terminal;
at least one sensor disposed within and electrically coupled to said electronic circuit, said at least one sensor configured to sense a performance metric of said electronic circuit and to provide a signal representative of said performance metric;
a plurality of actuators disposed within said integrated circuit, each actuator of said plurality of actuators having electrically coupled to it a control terminal, said plurality of actuators being configured either to couple at least one transistor of said plurality of transistors to said electronic circuit or decouple the at least one transistor of said plurality of transistors from said electronic circuit, in response to operation of one of said control terminals to improve said performance metric;
a digital processing core configured to receive said signal representative of said performance metric from said at least one sensor, said digital processing core configured to use said signal representative of said performance metric in the performance of an algorithm recorded in the form of instructions on a machine-readable medium in a non-volatile manner to produce a control signal, said digital processing core configured to apply said control signal to a respective control terminal of said plurality of actuators; and
at least one power terminal and at least one common terminal electrically coupled to said electronic circuit and configured to accept power to operate said self-healing monolithic integrated circuit.

2. The self-healing monolithic integrated circuit of claim 1 , wherein said self-healing monolithic integrated circuit comprises CMOS technology.

3. The self-healing monolithic integrated circuit of claim 1 , wherein said performance metric comprises a performance metric selected from the group consisting of output power, efficiency, gain, PAE, and linearity.

4. The self-healing monolithic integrated circuit of claim 1 , wherein said self-healing monolithic integrated circuit is component of a system selected from the group of systems consisting of a point-to-point link, a local area network (LAN), a personal area network (PAN), a vehicle radar system, an all weather vision system, a medical imaging sensor, a space probe imaging system, and a plasma diagnostic system.

5. The self-healing monolithic integrated circuit of claim 1 , further comprising a general purpose programmable computer and a set of instructions recorded on a computer-readable medium which when operating on said general purpose programmable computer cause said general purpose programmable computer to be configured to receive sensed information and to set at least one of said control terminals to optimize said performance metric.

6. The self-healing monolithic integrated circuit of claim 5 , wherein said set of instructions recorded on a computer-readable medium when operating runs on a computer device external to said monolithic integrated circuit.

7. The self-healing monolithic integrated circuit of claim 5 , wherein said set of instructions recorded on a computer-readable medium when operating runs on a digital circuit disposed within said monolithic integrated circuit.

8. The self-healing monolithic integrated circuit of claim 7 , wherein said digital circuit comprises a state machine.

9. The self-healing monolithic integrated circuit of claim 7 , wherein said state machine is further controlled by a parent set of instructions recorded on a computer-readable medium.

10. The self-healing monolithic integrated circuit of claim 1 , wherein said plurality of actuators comprise a tunable matching network.

11. The self-healing monolithic integrated circuit of claim 10 , wherein said tunable matching network comprises a selected one of a T-line and a tunable slow-wave transmission line.

12. The self-healing monolithic integrated circuit of claim 10 , wherein said self-healing monolithic integrated circuit is configured to automatically self-heal in response a selected one of change in antenna impedance and load characteristics.

13. The self-healing monolithic integrated circuit of claim 1 , wherein said integrated circuit comprises a mm-wave circuit.

14. The self-healing monolithic integrated circuit of claim 1 , wherein said self-healing monolithic integrated circuit senses a phase difference between a gate current and a drain voltage.

15. The self-healing monolithic integrated circuit of claim 14 , wherein said self-healing monolithic integrated circuit is configured to operate at least one of said control terminals to cause said phase difference between said gate current and said drain voltage to change towards a quadrature phase difference.

16. The self-healing monolithic integrated circuit of claim 1 , wherein said self-healing monolithic integrated circuit is configured to adjust a bias voltage or a threshold voltage through body effect (triple-well process) based on a gain estimate based on an output of a peak detector sensor.

17. The self-healing monolithic integrated circuit of claim 1 , wherein said self-healing monolithic integrated circuit comprises a Schottky peak detector.

18. The self-healing monolithic integrated circuit of claim 1 , wherein said self-healing monolithic integrated circuit senses an efficiency metric of said circuit using a temperature sensor.

19. The self-healing monolithic integrated circuit of claim 18 , wherein said temperature sensor comprises a PTAT sensor.

20. The self-healing monolithic integrated circuit of claim 1 , further comprising two or more on-chip antennas configured to provide power combining.

Assignees

• California Inst Of Techn

Inventors

• Bowers Steven
• Sengupta Kaushik
• Dasgupta Kaushik
• Hajimiri Seyed Ali

Classifications

• H03F1/565

  using inductive elements · CPC title

• H01P1/127

  Strip line switches · CPC title

• H03F2200/318

  A matching circuit being used as coupling element between two amplifying stages · CPC title

• H03F1/0261

  with control of the polarisation voltage or current, e.g. gliding Class A · CPC title

• H03F1/0211

  with control of the supply voltage or current · CPC title