Mechanisms for forming oxide layer over exposed polysilicon during a chemical mechanical polishing (CMP) process

Patent metadata

Field	Value
Publication number	US-9711374-B2
Application number	US-201313916827-A
Country	US
Kind code	B2
Filing date	Jun 13, 2013
Priority date	Jun 13, 2013
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

Embodiments of cleaning a surface of a polysilicon layer during a chemical mechanical polishing (CMP) process are provided. The method includes providing a substrate, and forming a gate structure on the substrate, and the gate structure includes a polysilicon layer. The method further includes forming an inter-layer dielectric layer (ILD) over the gate structure. The method also includes performing a CMP process to planarize the inter-layer dielectric layer (ILD) and to expose the polysilicon layer, and the CMP process includes: providing an oxidation solution to a surface of the substrate to perform an oxidation operation to form an oxide layer on the polysilicon layer; and providing a cleaning solution to the surface of the substrate to perform a cleaning operation.

First claim

What is claimed is:

1. A method for forming an oxide layer over an exposed polysilicon layer during a chemical mechanical polishing (CMP) process, comprising:
forming a gate structure on a substrate, wherein the gate structure comprises a polysilicon layer, and a first oxide layer is formed on the polysilicon layer;
forming an inter-layer dielectric layer (ILD) over the gate structure; and
performing a CMP process on the inter-layer dielectric layer (ILD), wherein the CMP process comprises:
performing a main CMP process to planarize the inter-layer dielectric layer (ILD) and to expose the polysilicon layer;
providing an oxidation solution to perform an oxidation reaction on the polysilicon layer and to transfer the first oxide layer to a second oxide layer, wherein the first oxide layer has a first thickness, the second oxide layer has a second thickness greater than the first thickness; and
stopping the oxidation solution and providing a cleaning solution to a surface of the polysilicon layer to perform a cleaning operation, wherein a portion of the second oxide layer is remaining on the polysilicon layer after the cleaning process, and the remaining portion of the second oxide layer is higher than a top surface of the inter-layer dielectric layer (ILD).

2. The method as claimed in claim 1 , wherein providing the oxidation solution and providing the cleaning solution are part of a buffing CMP operation of the CMP process.

3. The method as claimed in claim 1 , wherein the oxidation reaction and the cleaning operation are performed in-situ in a buffing CMP station.

4. The method as claimed in claim 1 , wherein forming the gate structure comprises:
forming a dielectric layer on the substrate;
forming the polysilicon layer on the dielectric layer;
forming a hard mask layer on the polysilicon layer; and
patterning the dielectric layer and the polysilicon layer to form the gate structure.

5. The method as claimed in claim 4 , further comprising:
removing the hard mask layer by another CMP process to expose the polysilicon layer after patterning the dielectric layer and the polysilicon layer, wherein another CMP process further comprises providing the oxidation solution and providing the cleaning solution.

6. The method as claimed in claim 1 , further comprising:
forming a contact etch stop layer (CESL) on the gate structure before forming the inter-layer dielectric layer (ILD).

7. The method as claimed in claim 6 , wherein the CMP process also removes the contact etch stop layer (CESL).

8. The method as claimed in claim 1 , wherein the oxidation solution is made of a hydrogen peroxide (H 2 O 2 ) solution, hydroxyl amine (NH 2 OH) solution, HClO, NaClO, KClO, Ca(OCl) 2 or combinations thereof.

9. The method as claimed in claim 1 , wherein the oxidation solution is formed by supplying oxygen-containing gas into water, wherein the oxygen-containing gas is made of oxygen (O 2 ), ozone (O 3 ) or combinations thereof.

10. The method as claimed in claim 1 , wherein the cleaning solution has a halide concentration in a range from about 0.1% to about 5%.

11. The method as claimed in claim 1 , further comprising:
providing another oxidation solution to the exposed polysilicon layer to perform another oxidation reaction after the cleaning operation.

12. A method for forming a FinFET device structure, comprising:
providing a plurality of fin structures extending from and above a substrate;
forming a dielectric layer between two adjacent fin structures;
forming a polysilicon layer over the fin structure and the dielectric layer, wherein a first oxide layer is formed on the polysilicon layer;
performing a CMP process on the polysilicon layer, wherein the CMP process comprises:
performing a main CMP process to expose the polysilicon layer;
providing an oxidation solution to a surface of the polysilicon layer to perform an oxidation reaction to transfer the first oxide layer to a second oxide layer, wherein the first oxide layer has a first thickness, the second oxide layer has a second thickness greater than the first thickness; and
providing a cleaning solution to the surface of the polysilicon layer to perform a cleaning operation, wherein a portion of the second oxide layer is remaining on the polysilicon layer after the cleaning process, and the cleaning solution is made of a halide including HBr, HCl, NaCl, NaF or NaBr.

13. The method as claimed in claim 12 , wherein providing the oxidation solution and providing the cleaning solution are part of a buffing CMP operation of the CMP process.

14. The method as claimed in claim 12 , wherein the oxidation reaction and the cleaning operation are performed in-situ in a buffing CMP station.

15. The method as claimed in claim 12 , wherein the oxidation solution is made of a hydrogen peroxide (H 2 O 2 ) solution, hydroxyl amine (NH 2 OH) solution, HClO, NaClO, KClO, Ca(OCl) 2 or combinations thereof.

16. The method as claimed in claim 12 , wherein the oxidation solution is formed by supplying oxygen-containing gas into water, wherein the oxygen-containing gas is made of oxygen (O 2 ), ozone (O 3 ) or combinations thereof.

17. The method as claimed in claim 12 , wherein the cleaning solution has a halide concentration in a range from about 0.1% to about 5%.

18. The method as claimed in claim 12 , further comprising:
providing another oxidation solution to the surface of the polysilicon layer to perform another oxidation reaction after the cleaning operation.

19. A method for forming an oxide layer over an exposed polysilicon layer, comprising:
forming a polysilicon layer on a substrate;
forming an inter-layer dielectric layer (ILD) over the polysilicon layer;
planarizing the inter-layer dielectric layer (ILD) to expose the polysilicon layer, wherein a first oxide layer is formed on the polysilicon layer;
performing an oxidation reaction on the polysilicon layer to transfer the first oxide layer to a second oxide layer, wherein the first oxide layer has a first thickness, the second oxide layer has a second thickness greater than the first thickness;
partially removing the second oxide layer to leave a remaining portion of the second oxide layer on the polysilicon layer, the remaining portion of the second oxide layer is higher than a top surface of the inter-layer dielectric layer (ILD).

20. The method as claimed in claim 19 , wherein the remaining portion of the second oxide layer has a third thickness, and the second thickness is greater than the third thickness.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Tu Che-Hao
• Chang Chih-Yu
• Hong William Weilun
• Chen Ying-Tsung

Classifications

• H10P95/062

  involving a dielectric removal step · CPC title

• H10P70/277

  the processing being a planarisation of conductive layers · CPC title

• H10P70/237

  the processing being a planarisation of insulating layers · CPC title

• H10P14/6308

  of Group IV semiconductors · CPC title

• H10P52/403 Primary

  of conductive or resistive materials · CPC title