Verification of distributed symmetric multi-processing systems

Patent metadata

Field	Value
Publication number	US-9710427-B2
Application number	US-201514709491-A
Country	US
Kind code	B2
Filing date	May 12, 2015
Priority date	Jun 14, 2012
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

A method, apparatus and product useful for verifying Distributed Symmetric Multi-Processing systems (DSMPs). The method comprising: determining one or more sub-systems of a DSMP, wherein each sub-system is a Symmetric Multi-Processing System (SMP) which comprises a shared memory and a set of processing entities that have the same access permissions to the shared memory; and verifying the DSMP using a verification tool designed to verify an SMP, wherein said verifying is performed by verifying each sub-system.

First claim

What is claimed is:

1. A computer-implemented method for verifying a Distributed Symmetric Multi-Processing system (DSMP), wherein the method is performed by a computer having a processor and memory unit,
wherein the DSMP comprises a first SMP node and a second SMP node, wherein each SMP node of the first and second SMP nodes comprises:
a memory that is divided into a global portion and a private portion;

and processing entities that are divided into pivot processing entities and non-pivot processing entities,
wherein the non-pivot processing entities of the first SMP node having access permission to the memory of the first SMP node and no access permission to the memory of the second SMP node;
wherein the non-pivot processing entities of the second SMP node having access permission to the memory of the second SMP node and no access permission to the memory of the first SMP node;
wherein the pivot processing entities of the first SMP node having access permission to the memory of the first SMP node and to the global portion of the memory of the second SMP node;
wherein the pivot processing entities of the second SMP node having access permission to the memory of the second SMP node and to the global portion of the memory of the first SMP node;
whereby the first and second SMP nodes do not exhibit an access symmetry property of having all processing entities having the same memory access permissions;
whereby a logical SMP is formed from processing entities of the first SMP node and processing entities of the second SMP node;
wherein the method comprising:
determining one or more sub-systems of the DSMP, wherein each sub-system is a Symmetric Multi-Processing System (SMP) which comprises a shared memory and a set of processing entities that have the same access permissions to the shared memory, whereby each of the one or more sub-systems exhibits the access symmetry property;
wherein said determining comprises:
determining a sub-system that is based on the logical SMP, the sub-system comprises:
one or more pivot processing entities of the first SMP node;
one or more pivot processing entities of the second SMP node;
at least a portion of the global portion of the memory of the first SMP node; and
at least a portion of the global portion of the memory of the second SMP node
whereby the sub-system exhibits the access symmetry property; and

verifying the DSMP using a verification tool designed to verify an SMP, wherein said verifying is performed by verifying each sub-system.

2. The computer-implemented method of claim 1 , wherein none of the sub-systems correspond exactly to an SMP node of the DSMP.

3. The computer-implemented method of claim 1 , wherein the DSMP comprises: a plurality of SMP nodes coupled together to form a cluster, each SMP node comprises:
one or more processing entities; and
memory, partitioned into a local and global partition, with the global partitions together forming a global memory accessible by processing entities of different SMP nodes of the cluster.

4. The computer-implemented method of claim 1 , wherein said determining the one or more sub-systems comprises: determining a second sub-system, wherein the second sub-system comprises:
one or more non-pivot processing entities of the first SMP node;
one or more pivot processing entities of the first SMP node; and
at least a portion of the local portion of the memory of the first SMP node;
whereby the second sub-system exhibits the access symmetry property.

5. The computer-implemented method of claim 4 , wherein said determining the one or more sub-systems comprises: determining a third sub-system, wherein the third sub-system comprises:
one or more pivot processing entities of the first SMP node;
at least a portion of the local portion of the memory of the first SMP node;
at least a portion of the global portion of the memory of the first SMP node; and
at least a portion of the global portion of the memory of the second SMP node;
whereby the third sub-system exhibits the access symmetry property.

Assignees

• Goryachev Alex
• Morad Ronny
• Rabetti Tali
• Shusterman Sergey
• IBM

Inventors

• Goryachev Alex
• Morad Ronny
• Rabetti Tali
• Shusterman Sergey

Classifications

• G06F15/167 Primary

  using a common memory, e.g. mailbox · CPC title

• G06F13/1663

  Access to shared memory · CPC title

• G06F15/17331 Primary

  Distributed shared memory [DSM], e.g. remote direct memory access [RDMA] · CPC title

• G06F9/5077

  Logical partitioning of resources; Management or configuration of virtualized resources (specific details on emulation or internal functioning of virtual machines G06F9/455) · CPC title