Endian configuration memory and ECC protecting processor endianess mode circuit

Patent metadata

Field	Value
Publication number	US-9710318-B2
Application number	US-201514602933-A
Country	US
Kind code	B2
Filing date	Jan 22, 2015
Priority date	Dec 23, 2010
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

An electronic circuit includes a microcontroller processor ( 410 ), a peripheral ( 420 ) coupled with the processor, an endian circuit ( 470 ) coupled with the processor and the peripheral to selectively provide different endianess modes of operation, and a detection circuit ( 140 ) to detect a failure to select a given endianess, whereby inadvertent switch of endianess due to faults is avoided. Other circuits, devices, systems, methods of operation and processes of manufacture are also disclosed.

First claim

What is claimed is:

1. An electronic circuit comprising:
a microcontroller processor;
a peripheral coupled with the processor;
an endian circuit coupled with the processor and the peripheral to selectively provide different endianess modes of operation; and
a detection circuit coupled to the endian circuit to detect a failure to select a given endianess, so that inadvertent switch of endianess due to faults is avoided, the detection circuit including an endianess configuration memory and an error correcting code (ECC) circuit operable to protect the endianess configuration memory.

2. The electronic circuit claimed in claim 1 in which the detection circuitry prevents endianess configuration except on power up reset.

3. The electronic circuit of claim 1 including an integrated circuit carrying the microcontroller processor, the peripheral, the endian circuit, and the detection circuit.

Assignees

• Texas Instruments Inc

Inventors

• Xiao Yanyang
• Palus Alexandre Pierre
• Greb Karl Friedrich
• Lavery Kevin Patrick
• Krause Paul

Classifications

• G06F11/1641 Primary

  where the comparison is not performed by the redundant processing components · CPC title

• H03M13/13

  Linear codes · CPC title

• G06F11/1654

  where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O · CPC title

• G06F11/1008

  in individual solid state devices (G06F11/1004 takes precedence) · CPC title

• G06F11/1068

  in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence) · CPC title