Processing Signals in a Quantum Computing System
US-2016267032-A1 · Sep 15, 2016 · US
US9709625B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9709625-B2 |
| Application number | US-201113170512-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 28, 2011 |
| Priority date | Nov 19, 2010 |
| Publication date | Jul 18, 2017 |
| Grant date | Jul 18, 2017 |
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A method for determining power consumption of a power domain within an integrated circuit is presented. In a first step, a local power supply impedance profile (Z(f)) of this power domain is determined. Subsequently, a local time-resolved power supply voltage (U(t)) is measured while a well-defined periodic activity is executed in power domain. A set of time-domain measured voltage data (U(t)) is thus accumulated and transformed into the frequency domain to yield a voltage spectrum (U(f)). A current spectrum I(t) is calculated from this voltage profile (U(f)) by using the power supply impedance profile Z(f) of this power domain as I(t)=F f −1 {U(f)/Z(f)}. Finally, a time-resolved power consumption spectrum P(t) is determined from measured voltage spectrum U(t)) and calculated current spectrum (I(t)). This power consumption (P(t)) may be compared with a reference (P ref (t)) to verify whether power consumption within power domain matches expectations.
Opening claim text (preview).
What is claimed is: 1. A method comprising: determining power consumption of one power domain of multiple power domains within an integrated circuit, said determining comprising: electrically connecting a test system to said one power domain of the multiple power domains of the integrated circuit, the test system comprising a voltage measurement system; determining, by the test system, a local power supply impedance profile (Z(f)) specific to said one power domain of the multiple power domains of the integrated circuit; executing, by the integrated circuit, a periodic activity specific to said one power domain, wherein the periodic activity causes a defined amount of power to be dissipated in the one power domain; during the executing, measuring, by the voltage measurement system of the test system, a local power supply voltage (U(t)) for the one power domain; concurrent with the determining of the local power supply impedance profile (Z(f)) specific to said one power domain and the measuring, isolating one or more of the multiple power domains, from the one power domain, the isolating comprising preventing interferences or distortions of the one or more of the multiple power domains of the integrated circuit from influencing said one power domain during determining the local power supply impedance profile (Z(f)) specific to said one power domain and measuring the power supply voltage (U(t)), wherein the isolating does not comprise switching off the one or more of the multiple power domains; evaluating, by the test system, a voltage spectrum (U(f)) of said measured local power supply voltage (U(t)) for the one power domain; calculating, by the test system, an associated power supply current (I(t)) from said impedance profile (Z(f)) and said voltage spectrum (U(f)) for the one power domain; determining, by the test system, a power consumption spectrum (P(t)) for the one power domain of the multiple power domains within the integrated circuit from said power supply current (I(t)) and the measured power supply voltage (U(t)) for the one power domain; and based on the determining the power consumption spectrum (P(t)) for the one power domain of the multiple power domains, dimensioning and placing cooling resources to adequately cool the integrated circuit during operation. 2. The method of claim 1 , wherein the executing the periodic activity comprises a repetitive activity of toggling a clock tree to generate a high percentage of maximum dynamic current consumption to excite the one power domain and wherein the determining said local power supply impedance profile of said one power domain comprises: evaluating a temporal behavior of a current consumption (I 0 (t)) caused by the repetitive activity; calculating a corresponding current consumption spectrum (I 0 (f)); measuring a local power supply voltage (U 0 (t)) for the one power domain caused by said repetitive activity; evaluating a voltage spectrum (U 0 (f)) of said measured local power supply voltage (U0(t)); and calculating said local power supply impedance profile (Z(f)) for the one power domain from said voltage and current spectra (U 0 (f), I 0 (f)). 3. The method of claim 2 , wherein the evaluating the temporal behavior of the current consumption (I 0 (t)) comprises obtaining quasi-static measurements of a leakage current (I 0 leak ) and a current amplitude (I 0 ampl ) of the repetitive activity. 4. The method of claim 1 , further comprising comparing the power consumption spectrum P to a reference spectrum P ref . 5. The method of claim 1 , wherein the method is carried out during integrated circuit power-on. 6. The method of claim 1 , wherein the method is carried out periodically during integrated circuit operation. 7. A system comprising: a test system for determining power consumption of one power domain of multiple power domains within an integrated circuit, the test system for determining comprising: a memory for storing a local power supply impedance profile Z(f) specific to said one power domain of the multiple power domains of the integrated circuit; an Activity Stimulation System for executing by the integrated circuit a periodic activity specific to said one power domain, wherein the periodic activity causes a defined amount of power to be dissipated in the one power domain; a Voltage Measurement System for measuring a local power supply voltage (U(t)) of said one power domain and concurrent with the measuring, isolating one or more of the multiple power domains, from the one power domain, the isolating comprising preventing interferences or distortions of the one or more of the multiple power domains of the integrated circuit from influencing said one power domain during the storing and the measuring, wherein the isolating does not comprise switching off the one or more of the multiple power domains; a Fourier Transform System for evaluating a voltage spectrum (U(f)) of said measured local power supply voltage (U(t)) and for calculating associated current (I(t)) from said impedance profile (Z(f)) and said voltage spectrum (U(f) for the one power domain; and a Power Evaluation System for determining a power consumption (P(t)) for the one power domain of the multiple power domains within the integrated circuit; and based on the determining the power consumption spectrum (P(t)) for the one power domain of the multiple power domains, dimensioning and placing cooling resources to adequately cool the integrated circuit during operation. 8. The system of claim 7 , further comprising a Comparator for comparing said power consumption spectrum (P(t)) to a reference profile (P ref (t)). 9. The system of claim 7 , wherein the system is integrated into the integrated circuit. 10. The system of claim 8 , wherein the Activity Stimulation System and the Voltage Measurement System reside on a chip with the integrated circuit, and the Comparator resides in a location outside the chip.
Power distribution; Power saving · CPC title
Built-In-Current test [BIC] · CPC title
Current or voltage test · CPC title
related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads · CPC title
Testing of integrated circuits [IC] (G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801) · CPC title
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