Methods for producing a cavity within a semiconductor substrate

US9708182B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9708182-B2
Application numberUS-201514838988-A
CountryUS
Kind codeB2
Filing dateAug 28, 2015
Priority dateApr 17, 2012
Publication dateJul 18, 2017
Grant dateJul 18, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for producing at least one cavity within a semiconductor substrate, the method comprising: dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity; depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity; removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate; and electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity, wherein the electrochemical etching comprises a first temporal segment, during which an electrical voltage applied to the semiconductor substrate is increased, and a second temporal segment, during which the electrical voltage applied to the semiconductor substrate is kept constant. 2. The method according to claim 1 , further comprising: depositing an oxide mask for dry etching the semiconductor substrate prior to the dry etching. 3. The method according to claim 1 , wherein the dry etching comprises at least one of the following processes: reactive ion etching (RIE), deep reactive ion etching (DRIE) and a Bosch process. 4. The method according to claim 1 , wherein the protective material is an oxide, a silicon oxide or a spacer oxide. 5. The method according to claim 1 , wherein depositing the protective material comprises a plasma deposition, a thermal oxide deposition or a combination thereof. 6. The method according to claim 1 , wherein removing the protective material comprises plasma etching. 7. The method according to claim 1 , wherein, prior to removing the protective material, furthermore comprises depositing a mask and patterning the deposited mask. 8. The method according to claim 1 , wherein a basic etching medium is used for the electrochemical etching. 9. The method according to claim 1 , wherein the electrochemical etching provides an etching stop technique. 10. The method according to claim 1 , further comprising: carrying out a lithography process and a subsequent implantation in order to form a pn junction at a depth within the semiconductor substrate, wherein the depth of the pn junction is a function of a desired depth of the bottom of the at least one cavity. 11. The method according to claim 1 , wherein an etching medium used for the electrochemical etching comprises tetramethylammonium hydroxide (TMAH), an aqueous solution of ethylenediamine and pyrocatechol (EDP), hydrazine, potassium hydroxide (KOH) or a combination thereof. 12. A method for producing a micromechanical sensor system comprising: providing a doped semiconductor substrate; redoping at least one redoped region within the doped semiconductor substrate; and carrying out a patterning process for producing microelectromechanical structures in the semiconductor substrate and at a substrate surface, wherein at least one portion of the microelectromechanical structures provided extends into the redoped region; and carrying out the method for producing at least one cavity within the semiconductor substrate according to claim 1 , wherein the cavity adjoins the redoped region and the portion of the microelectromechanical structures which extends into the redoped region.

Assignees

Inventors

Classifications

  • of Group IV materials · CPC title

  • Dry etching · CPC title

  • Trenches · CPC title

  • Processes for achieving a desired geometry not provided for in groups B81C1/00563 - B81C1/00619 · CPC title

  • Forming high aspect ratio structures having deep steep walls · CPC title

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What does patent US9708182B2 cover?
A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconduc…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification B81C1/00531. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Jul 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).