Integration of laminate MEMS in BBUL coreless package

Patent metadata

Field	Value
Publication number	US-9708178-B2
Application number	US-201113995924-A
Country	US
Kind code	B2
Filing date	Dec 30, 2011
Priority date	Dec 30, 2011
Publication date	Jul 18, 2017
Grant date	Jul 18, 2017

Abstract

An apparatus including a die including a first side and an opposite second side including a device side with contact points and lateral sidewalls defining a thickness of the die; a build-up carrier coupled to the second side of the die, the build-up carrier including a plurality of alternating layers of conductive material and insulating material, wherein at least one of the layers of conductive material is coupled to one of the contact points of the die; and at least one device within the build-up carrier disposed in an area void of a layer of patterned conductive material. A method and an apparatus including a computing device including a package including a microprocessor are also disclosed.

First claim

The invention claimed is:

1. An apparatus comprising:
a computing device comprising a package including a microprocessor disposed in a build-up carrier,
the microprocessor comprising a first side and an opposite second side comprising a device side with contact points;
a build-up carrier coupled to the second side of the microprocessor, the build-up carrier comprising:
a plurality of alternating layers of patterned conductive material and insulating material starting from at least one layer of insulating material encapsulating the die and defining a first carrier side and accessible contacts on the first carrier side, wherein at least one of the layers of patterned conductive material is coupled to one of the contact points of the die,
at least one device within the build-up carrier disposed in an area void of a layer of patterned conductive material and comprising on one side a seal structure comprising a conductive material comprising a plurality of openings therethrough, and
a plurality of accessible second carrier contacts coupled to the conductive material on a second carrier side; and

a printed circuit board coupled to at least a portion of the plurality of accessible contacts.

2. The apparatus of claim 1 , wherein the at least one device comprises a microelectromechanical system (MEMS) device.

3. The apparatus of claim 1 , wherein the at least one device comprises a free-standing device.

4. An apparatus comprising:
a die comprising a first side and an opposite second side comprising a device side with contact points and lateral sidewalls defining a thickness of the die;
a build-up carrier coupled to the second side of the die, the build-up carrier comprising a plurality of alternating layers of patterned conductive material and insulating material starting from at least one layer of insulating material encapsulating the die and defining a first carrier side and contacts on the first carrier side and on an opposite second carrier side, wherein at least one of the layers of patterned conductive material is coupled to one of the contact points of the die; and
at least one device within the build-up carrier disposed in an area void of a layer of patterned conductive material and comprising on one side a seal structure comprising a conductive material comprising a plurality of openings therethrough.

5. The apparatus of claim 4 , wherein the at least one device comprises a free-standing device.

6. The apparatus of claim 4 , wherein the at least one device is disposed in the build-up carrier between adjacent layers of conductive material.

7. The apparatus of claim 4 , wherein the at least one device comprises a microelectromechanical system (MEMS) device.

8. The apparatus of claim 7 , wherein the at least one MEMS devices is a sensor.

9. The apparatus of claim 7 , wherein the at least one MEMS device is an actuator.

10. An apparatus comprising:
a die;
a build-up comprising a plurality of layers of patterned conductive material separated from adjacent layers by insulating material starting from at least one layer of insulating material encapsulating the die, wherein at least one of the layers of patterned conductive material is coupled to a contact point of the die; and
at least one device within the build-up carrier disposed in an area void of a layer of patterned conductive material and comprising on one side a seal structure comprising a conductive material comprising a plurality of openings therethrough.

11. The apparatus of claim 10 , wherein the at least one device comprises a free-standing device.

12. The apparatus of claim 10 , wherein the at least one device comprises a microelectromechanical system (MEMS) device.

13. The apparatus of claim 12 , wherein the at least one MEMS devices is a sensor.

14. The apparatus of claim 12 , wherein the at least one MEMS device is an actuator.

15. The apparatus of claim 12 , wherein the at least one MEMS device is disposed in the build-up carrier between adjacent layers of conductive material.

Assignees

• Teh Weng Hong
• Sankman Robert L
• Intel Corp

Inventors

• Teh Weng Hong
• Sankman Robert L

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/721

  of bump connectors · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/9413

  on encapsulations · CPC title