Multilayer capacitor and board having the same

US9706641B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9706641-B1
Application numberUS-201615285115-A
CountryUS
Kind codeB1
Filing dateOct 4, 2016
Priority dateMar 22, 2016
Publication dateJul 11, 2017
Grant dateJul 11, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer capacitor includes internal electrodes having a plurality of lead portions exposed in a width direction of a body, and external electrodes connected to the lead portions, the external electrodes including a conducting layer, conductive resin layers, and a plating layer, respectively, and a board having the same.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer capacitor comprising: a body including first and second internal electrodes alternately disposed with at least one dielectric layer interposed therebetween, the first internal electrodes having a plurality of first lead portions exposed to a first surface of the body, and the second internal electrodes having a plurality of second lead portions exposed to a second surface of the body opposing the first surface, wherein the plurality of first lead portions are spaced apart from each other and the plurality of second lead portions are spaced apart from each other; and first and second external electrodes respectively disposed on the first and second surfaces of the body to which the first and second lead portions are exposed, wherein the first external electrode includes a first conducting layer formed on the first surface of the body to cover the plurality of first lead portions, a plurality of first conductive resin layers formed on the first conducting layer to correspond to the first lead portions, respectively, and a first plating layer formed on the first conducting layer to cover the plurality of first conductive resin layers, and the second external electrode includes a second conducting layer formed on the second surface of the body to cover the plurality of second lead portions, a plurality of second conductive resin layers formed on the second conducting layer to correspond to the second lead portions, respectively, and a second plating layer formed on the second conducting layer to cover the plurality of second conductive resin layers. 2. The multilayer capacitor of claim 1 , wherein the first external electrode further includes first polymer resin layers disposed between the plurality of first lead portions on the first conducting layer, and the second external electrode further includes second polymer resin layers disposed between the plurality of second lead portions on the second conducting layer. 3. The multilayer capacitor of claim 2 , wherein the first plating layers are formed on the respective first conductive resin layers, with the first polymer resin layers interposed therebetween, and the second plating layers are formed on the respective second conductive resin layers, with the second polymer resin layers interposed therebetween. 4. The multilayer capacitor of claim 1 , wherein the first and second lead portions are respectively exposed to first and second surfaces of the body in a width direction. 5. The multilayer capacitor of claim 1 , wherein the first and second lead portions are respectively exposed to first and second surfaces of the body in a length direction. 6. The multilayer capacitor of claim 1 , wherein the first and second conducting layers each extend onto a portion of a surface of the body in a thickness direction. 7. The multilayer capacitor of claim 6 , wherein the first and second conductive resin layers each extend to the extended portions of the first and second conducting layers. 8. The multilayer capacitor of claim 7 , wherein the first and second plating layers each extend to cover the extended portions of the first and second conducting layers and to cover the extended portions of the first and second conductive resin layers. 9. The multilayer capacitor of claim 1 , wherein the first conductive resin layers contain a thermosetting resin and a metal. 10. The multilayer capacitor of claim 1 , wherein the second conductive resin layers contain a thermosetting resin and a metal. 11. Aboard having a multilayer capacitor, comprising: a substrate, having first and second electrode pads disposed on an upper surface thereof; and the multilayer capacitor of claim 1 , of which the first and second plating layers are mounted on the first and second electrode pads.

Assignees

Inventors

Classifications

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • H05K1/0243Primary

    Printed circuits associated with mounted high frequency components · CPC title

  • Non-printed capacitor · CPC title

  • leading through the housing, i.e. lead-through · CPC title

  • associated with surface mounted components · CPC title

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What does patent US9706641B1 cover?
A multilayer capacitor includes internal electrodes having a plurality of lead portions exposed in a width direction of a body, and external electrodes connected to the lead portions, the external electrodes including a conducting layer, conductive resin layers, and a plating layer, respectively, and a board having the same.
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 11 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).