Semiconductor module

Patent metadata

Field	Value
Publication number	US-9704828-B2
Application number	US-201414786295-A
Country	US
Kind code	B2
Filing date	Oct 16, 2014
Priority date	Oct 16, 2014
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

A semiconductor module according to one embodiment of the present invention includes: a first circuit board having thermal conductivity; a second circuit board having thermal conductivity and disposed opposing the first circuit board; a first semiconductor element joined to an opposing surface of the first circuit board opposing the second circuit board; a second semiconductor element joined to an opposing surface of the second circuit board opposing the first circuit board; and a connector electrically connecting the first semiconductor element and the second semiconductor element. The connector includes a portion which is sandwiched between the first semiconductor element and the second circuit board without through the second semiconductor element, and which is in contact with the first semiconductor element and the second circuit board.

First claim

The invention claimed is:

1. A semiconductor module comprising:
a first circuit board having thermal conductivity and having a first surface;
a second circuit board having thermal conductivity and having a second surface opposing the first surface of the first circuit board;
a first semiconductor element mounted on the first surface of the first circuit board;
a second semiconductor element mounted on the second surface of the second circuit board; and
a connector having thermal conductivity and electrically connecting the first semiconductor element and the second semiconductor element,
wherein the connector includes
a first element joining portion connecting the first semiconductor element and the second surface of the second circuit board while not being in contact with the first surface of the first circuit board and the second semiconductor element, and
a second element joining portion connecting the second semiconductor element and the first surface of the first circuit board while not being in contact with the second surface of the second circuit board and the first semiconductor element, the second element joining portion being connected to the first element joining portion.

2. The semiconductor module according to claim 1 , wherein the first semiconductor element and the second semiconductor element are arranged so as not to overlap each other when viewed in a direction perpendicular to the first surface of the first circuit board and the second surface of the second circuit board, the second circuit board being substantially parallel to the first circuit board.

Assignees

• Shindengen Electric Mfg

Inventors

• Ikeda Kosuke
• Morinaga Yuji
• Matsuzaki Osamu

Classifications

• H10W90/288

  characterised by arrangements for thermal management of the stacked chips · CPC title

• H10W90/22

  the stacked chips being on both top and bottom sides of a package substrate, interposer or RDL · CPC title

• H10W90/24

  at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape · CPC title

• H10W90/752

  between stacked chips · CPC title

• H10W90/732

  between stacked chips · CPC title