COG dielectric composition for use with nickel electrodes

US9704650B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9704650-B2
Application numberUS-201415024166-A
CountryUS
Kind codeB2
Filing dateSep 8, 2014
Priority dateOct 30, 2013
Publication dateJul 11, 2017
Grant dateJul 11, 2017

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

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Multilayer ceramic chip capacitors which satisfy COG requirements and which are compatible with reducing atmosphere sintering conditions so that non-noble metals such as nickel and nickel alloys may be used for internal and external electrodes are disclosed. The capacitors exhibit desirable dielectric properties (high capacitance, low dissipation factor, high insulation resistance), excellent performance on highly accelerated life testing, and very good resistance to dielectric breakdown. The dielectric layers comprise a strontium zirconate matrix doped with other metal oxides such as TiO 2 , MgO, B 2 O 3 , CaO, MnO, Nd2O3 and Nb2O5 in various combinations.

First claim

Opening claim text (preview).

What is claimed: 1. A lead-free and cadmium-free dielectric material comprising a solids portion wherein the solids portion comprises, prior to firing: no lead and no cadmium; optionally up to about 1.3 SrTiO 3 ; from about 70.8 wt % to about 81.7 wt % SrZrO 3 ; optionally up to about 3.4 wt % CaZrO 3 ; optionally up to about 7.6 wt % CaTiO 3 ; from about 11.6 wt % to about 13.5 wt % Sr 2 Nb 2 O 7 ; optionally up to about 7.1 wt % Nd 2 ZrO 5 ; from about 0.27 wt % to about 0.38 wt % B 2 O 3 ; from about 0.31 wt % to about 0.44 wt % MgO; and optionally up to about 0.06 wt % MnO. 2. A method of forming an electronic component comprising: applying the dielectric material of claim 1 to a substrate; and firing the substrate at a temperature sufficient to sinter the dielectric material. 3. The method of claim 2 , wherein the firing is conducted at a temperature of from about 1200° C. to about 1350° C. 4. The method of claim 2 , wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm. 5. A multilayer ceramic chip capacitor comprising a fired collection of: alternately stacked layers of: the dielectric material of claim 1 ; and layers of an internal electrode material comprising a transition metal other than Ag, Au, Pd, or Pt. 6. The multilayer ceramic chip capacitor of claim 5 , wherein the internal electrode material comprises nickel. 7. A method of forming an electronic component comprising: alternately applying layers of the dielectric material of claim 1 , and a metal-containing electrode paste onto a substrate to form a laminar stack; firing the substrate at a temperature sufficient to sinter the dielectric material; cutting the laminar stack to a predetermined shape; separating the cut stack from the substrate; and firing the stack to sinter the metal in the electrode paste and fuse the oxides in the dielectric material. 8. The method of claim 7 , wherein the layers of dielectric material, after firing, each have a thickness of about 1 microns to about 50 microns. 9. The method of claim 7 , wherein the firing is conducted at a temperature of from about 1200° C. to about 1325° C. 10. The method of claim 7 , wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm. 11. The method of claim 7 , wherein the metal-containing electrode paste comprises nickel. 12. The composition according to claim 1 , wherein the dielectric material exhibits a dielectric constant greater than 31. 13. The electronic component formed by the method of claim 2 , wherein the sintered dielectric material exhibits a dielectric constant greater than 31.

Assignees

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Classifications

  • Forming laminates or joining articles wherein at least one substrate contains at least two different parts of macro-size, e.g. one ceramic substrate layer containing an embedded conductor or electrode · CPC title

  • Manganese oxides, manganates, rhenium oxides or oxide-forming salts thereof, e.g. MnO · CPC title

  • submicron sized, i.e. from 0,1 to 1 micron · CPC title

  • Niobates or tantalates, e.g. silver niobate · CPC title

  • based on zirconium oxides or zirconates (H01G4/1263 takes precedence) · CPC title

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What does patent US9704650B2 cover?
Multilayer ceramic chip capacitors which satisfy COG requirements and which are compatible with reducing atmosphere sintering conditions so that non-noble metals such as nickel and nickel alloys may be used for internal and external electrodes are disclosed. The capacitors exhibit desirable dielectric properties (high capacitance, low dissipation factor, high insulation resistance), excellent p…
Who is the assignee on this patent?
Ferro Corp
What technology area does this patent fall under?
Primary CPC classification H01G4/1245. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 11 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).