Analogue signal processing circuit for microphone
US-2016112796-A1 · Apr 21, 2016 · US
US9699551B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9699551-B2 |
| Application number | US-201514853616-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 14, 2015 |
| Priority date | Oct 20, 2014 |
| Publication date | Jul 4, 2017 |
| Grant date | Jul 4, 2017 |
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An analog signal processing circuit of a microphone includes a bias circuit including a first sub-circuit which receives a signal from the microphone to output a first signal and a second sub-circuit which receives a reference voltage to output a second signal. A fully differential circuit receives the first signal and the second signal to output a fully differential signal. Each of the first sub-circuit and the second sub-circuit includes a bias sub-circuit to apply a bias voltage.
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What is claimed is: 1. An analog signal processing circuit of a microphone, comprising: a bias circuit including a first sub-circuit which receives a signal from the microphone to output a first signal and a second sub-circuit which receives a reference voltage to output a second signal; and a fully differential circuit which receives the first signal and the second signal to output a fully differential signal, wherein the first sub-circuit and the second sub-circuit include a first bias sub-circuit and a second bias sub-circuit to apply bias voltages, respectively, wherein each of the first and second bias sub-circuits comprises a first pair of anti-parallel diodes and a second pair of anti-parallel diodes directly connected to the first pair of anti-parallel diodes, and wherein, in each of the first and second bias sub-circuits, a first respective reference voltage is applied to the first pair of anti-parallel diodes, a second respective reference voltage is applied to the second pair of anti-parallel diodes, and a middle value of the first and second respective reference voltages is applied to a node between the first and second pairs of anti-parallel diodes. 2. The analog signal processing circuit of claim 1 , wherein the first respective reference voltages of the first and second bias sub-circuits are different from each other, and the second respective reference voltages of the first and second bias sub-circuits are different from each other. 3. The analog signal processing circuit of claim 1 , wherein the first sub-circuit comprises a first capacitor between the microphone and the first bias sub-circuit, and the second sub-circuit comprises a second capacitor between the microphone and the second bias sub-circuit. 4. The analog signal processing circuit of claim 3 , wherein capacitance of the first capacitor is same as that of the second capacitor. 5. The analog signal processing circuit of claim 1 , wherein the fully differential circuit comprises a fully differential amplifier and a resistive divider. 6. The analog signal processing circuit of claim 5 , wherein the resistive divider comprises a variable resistor. 7. The analog signal processing circuit of claim 6 , wherein the fully differential circuit comprises a first differential input stage and a second differential input stage having two input terminals, respectively, and a differential output stage having two output terminals, and the first signal is input to one input terminal of the first differential input stage, while the second signal is input to one input terminal of the second differential input stage. 8. The analog signal processing circuit of claim 7 , wherein the resistive divider comprises a first resistive divider connected between another input terminal of the first differential input stage and one output terminal of the differential output stage, and a second resistive divider connected between another input terminal of a second differential input stage and another output terminal of the differential output stage.
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