Detachment of a self-supporting layer of silicon <100>

Patent metadata

Field	Value
Publication number	US-9698289-B2
Application number	US-201314412874-A
Country	US
Kind code	B2
Filing date	Jul 1, 2013
Priority date	Jul 3, 2012
Publication date	Jul 4, 2017
Grant date	Jul 4, 2017

Abstract

A method for detaching a self-supporting layer of silicon of crystalline orientation <100>, particularly with the aim of applications in the field of photovoltaics, wherein the method includes the steps of: a) Implanting ionic species in a substrate made of silicon having a crystalline orientation <100> so as to create an embrittlement plane in the substrate, delimiting on both sides a self-supporting layer and a negative of the substrate, and b) Applying a heat treatment to the substrate implanted at step a) with a temperature ramp greater than 30° C./s so as to detach the self-supporting layer of silicon.

First claim

The invention claimed is:

1. A method for detaching a self-supporting layer of silicon of crystalline orientation <100>, wherein the method comprises:
a) implanting ionic species across an entire surface of a substrate made of silicon having a crystalline orientation <100> with a dose of less than or equal to 8×10 16 atoms/cm 2 so as to create an embrittlement plane in the substrate, delimiting on both sides a self-supporting layer and a negative of the substrate; and
b) applying a heat treatment up to a temperature of from 550° C. to 800° C. to the substrate implanted at step a) with a temperature ramp greater than 30° C./s so as to detach the self-supporting layer of silicon crystalline orientation <100>, wherein the self-supporting layer of silicon crystalline orientation <100> has a thickness greater than 10 micrometers and wherein a roughness of a surface of the negative of the substrate detached from the substrate and a roughness of a surface of the self-supporting layer detached from the substrate is low.

2. The method according to claim 1 , wherein the temperature ramp is comprised between 50° C./s and 100° C./s.

3. The method according to claim 1 , wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a).

4. The method according to claim 1 , wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a) by one of radiation.

5. The method according to claim 1 , wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a) by one of conduction.

6. The method according to claim 1 , wherein the heat treatment is applied simultaneously on the entire substrate implanted at step a) by one of convection.

7. The method according to claim 1 , wherein the implanted ionic species are obtained from hydrogen.

8. The method according to claim 1 , wherein the dose of implanted ionic species is less than or equal to 7·10 16 atoms/cm 2 .

9. The method according to claim 1 , wherein the implanting step a) is carried out with such an energy that the thickness of the detached self-supporting layer is comprised between 10 and 100 micrometers.

10. The method according to claim 1 , wherein the implanting step a) is carried out with such an energy that the thickness of the detached self-supporting layer is comprised between 15 and 50 micrometers.

11. The method according to claim 1 , wherein the implanting step a) of the ionic species is carried out with an energy greater than 1 MeV.

12. The method according to claim 1 , wherein the implanting step a) is carried out in a silicon substrate of crystalline orientation <100>exhibiting a thickness greater than or equal to 700 micrometers.

13. The method according to claim 1 , wherein the implanting step a) is carried out in a silicon substrate of crystalline orientation <100>exhibiting a thickness comprised between 1 and 50 millimeters.

14. The method according to claim 1 , wherein the method comprises a step c) carried out after step b) consisting of repeating the steps a) and b) in the negative of the substrate made of silicon having a crystalline orientation <100>obtained in the previously carried out step b), so as to detach a new self-supporting layer of silicon.

Assignees

• Commissariat Energie Atomique
• Commissariat à l'Energie Atomique et aux Energies Alternatives

Inventors

• Braley Carole
• Mazen Frédéric

Classifications

• H10W10/181

  Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P90/1916 Primary

  with separation or delamination along an ion implanted layer, e.g. Smart-cut · CPC title

• H10P30/20

  into semiconductor materials, e.g. for doping · CPC title

• Y02E10/50

  Photovoltaic [PV] energy · CPC title