Solid state imaging device
US-2024170528-A1 · May 23, 2024 · US
US9698196B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9698196-B2 |
| Application number | US-85670110-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 16, 2010 |
| Priority date | Aug 14, 2009 |
| Publication date | Jul 4, 2017 |
| Grant date | Jul 4, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A demodulation pixel improves the charge transport speed and sensitivity by exploiting two effects of charge transport in silicon in order to achieve the before-mentioned optimization. The first one is a transport method based on the CCD gate principle. However, this is not limited to CCD technology, but can be realized also in CMOS technology. The charge transport in a surface or even a buried channel close to the surface is highly efficient in terms of speed, sensitivity and low trapping noise. In addition, by activating a majority carrier current flowing through the substrate, another drift field is generated below the depleted CCD channel. This drift field is located deeply in the substrate, acting as an efficient separator for deeply photo-generated electron-hole pairs. Thus, another large amount of minority carriers is transported to the diffusion nodes at high speed and detected.
Opening claim text (preview).
What is claimed is: 1. A demodulation pixel comprising: a semiconductor substrate; a photo sensitive section in the semiconductor substrate for converting light into charge carriers; storage nodes for receiving the charge carriers; a demodulation region for transferring the charge carriers to the different storage nodes; a high-low junction underneath the photo sensitive section for directing charge carriers generated in the photo sensitive section to a surface of the semiconductor substrate for transfer to the demodulation region; and a non-uniform doping profile in the photo sensitive section for generating a lateral drift field in the photo sensitive section to transfer the charges to the demodulation region. 2. A demodulation pixel, comprising: a semiconductor substrate; a photo sensitive section in the semiconductor substrate for converting light into charge carriers; storage nodes for receiving the charge carriers; a demodulation region for transferring the charge carriers to the different storage nodes; a majority carrier current through semiconductor substrate and under the photo sensitive section that directs the charge carriers to the demodulation region. 3. A pixel as claimed in claim 2 , further comprising photo gates over the photo sensitive section for generating a lateral drift field to direct the charge carriers to the demodulation region. 4. A pixel as claimed in claim 2 , further comprising an n implantation region over the photo sensitive section for generating a lateral drift field in photo sensitive section that has a changing doping concentration in a direction of the demodulation region. 5. A pixel as claimed in claim 2 , further comprising capacitively-coupled gates over the photo sensitive section for generating a lateral drift field to direct the charge carriers to the demodulation region. 6. A pixel as claimed in claim 2 , further comprising a non-uniform doping profile in the photo sensitive section for generating a lateral drift field in the photo sensitive section to transfer the charges to the demodulation region. 7. A pixel as claimed in claim 2 , further comprising a high-low junction underneath the photo sensitive section for directing charge carriers to a surface of the semiconductor substrate. 8. A pixel as claimed in claim 2 , further comprising graded or gradually doped substrate for directing charge carriers to a surface of the semiconductor substrate. 9. A pixel as claimed in claim 2 , further comprising two majority carrier nodes on either end of the photo sensitive section between which the majority carrier current flows. 10. A pixel as claimed in claim 9 , wherein the majority carrier nodes are p-implantations in the semiconductor substrate. 11. A pixel as claimed in claim 2 , further comprising a depleted implantation region in the photo sensitive section for facilitating the transport of the charge carriers to the demodulation region. 12. A pixel as claimed in claim 11 , wherein the depleted implantation region is funnel shaped in the direction of the demodulation region.
Electricity · mapped topic
Constructional details of image sensors · CPC title
Geometry or disposition of pixel elements, address lines or gate electrodes · CPC title
comprising A/D, V/T, V/F, I/T or I/F converters · CPC title
comprising storage means other than floating diffusion · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.