Semiconductor element and solid-state imaging device

Patent metadata

Field	Value
Publication number	US-9202902-B2
Application number	US-201314419341-A
Country	US
Kind code	B2
Filing date	Aug 1, 2013
Priority date	Aug 3, 2012
Publication date	Dec 1, 2015
Grant date	Dec 1, 2015

Abstract

A semiconductor element encompasses a charge-transfer path defined in a semiconductor region ( 34.35 ), configured to transfer signal charges, (b) a pair of first field-control electrodes ( 42 a, 42 b ) laminated via an insulating film on the semiconductor region so as to sandwich the charge-transfer path in between, and a pair of second field-control electrodes ( 43 a, 43 b ) arranged separately from and adjacently to the first field-control electrodes ( 42 a, 42 b ). By applying field-control voltages differing from each other, to the first and second field-control electrodes ( 43 a, 43 b ), a depleted potential in the charge-transfer path is changed, and a movement of the signal charges transferring in the semiconductor region is controlled. Because electric field can be made constant over a long distance along the charge-transfer direction, a semiconductor element and a solid-state imaging device, in which problems caused by interface defects and the like are avoided, can be provided.

First claim

What is claimed is:

1. A semiconductor element, comprising:
a charge-transfer path defined in a semiconductor region, configured to transfer signal charges;
a pair of first field-control electrodes laminated via an insulating film on the semiconductor region so as to sandwich the charge-transfer path in between, in a planar pattern, along a direction orthogonal to a transfer direction of the signal charges, and
a pair of second field-control electrodes arranged separately from and adjacently to the first field-control electrodes, respectively, along the transfer direction, and laminated via the insulating film on the semiconductor region, so as to sandwich the charge-transfer path in between, in the planar pattern, along the direction orthogonal to the transfer direction,
wherein field-control voltages, which differ from each other, are applied to the first and second field-control electrodes, and a depleted potential in the charge-transfer path is changed, thereby controlling a movement of the signal charges transferring in the semiconductor region.

2. The semiconductor element of claim 1 , wherein the semiconductor region comprises:
an active-area formation layer implemented by semiconductor of a first conductivity type;
a surface buried region of a second conductivity type formed on a part of an upper portion of the active-area formation layer; and
a pinning layer of the first conductivity type formed in contact with a surface of the surface buried region, and
wherein majority carriers in the surface buried region are transferred as the signal charges through the surface buried region.

3. The semiconductor element of claim 2 , wherein the active-area formation layer is formed on a semiconductor substrate of the first or the second conductivity type.

4. The semiconductor element of claim 2 , wherein in the pinning layer, a density of opposite-conductivity type carriers to the signal charges is changed by voltages applied to the first and second field-control electrodes, together with a change in the depleted potential in the charge-transfer path.

5. The semiconductor element of claim 1 , further comprising:
a pair of first charge-extraction regions formed partially on the semiconductor region, sandwiching the charge-transfer path in between, at positions outside the pair of first field-control electrodes, along the direction orthogonal to the transfer direction of the signal charges, and
a pair of second charge-extraction regions formed partially on the semiconductor region, sandwiching the charge-transfer path in between, at positions outside the pair of second field-control electrodes, along the direction orthogonal to the transfer direction of the signal charges,
wherein, by applying a voltage higher than a value for controlling the movement of the signal charges to the first and second field-control electrodes, the signal charges are extracted to the first and second charge-extraction regions.

6. The semiconductor element of claim 1 , further comprising a shield plate having an aperture through which light is selectively irradiated to a part of the charge-transfer path.

7. The semiconductor element of claim 1 , further comprising a pair of third field-control electrodes separated from the second field-control electrodes, respectively, along the transfer direction, arranged adjacently to edge sides of the second field-control electrodes on the sides opposite to the first field-control electrodes, respectively, and laminated via the insulating film on the semiconductor region, so as to sandwich the charge-transfer path in between, in the planar pattern, along the direction orthogonal to the transfer direction,
wherein the field-control voltages, which differ from each other, are applied to the second and third field-control electrodes, and the movement of the signal charges transferring in the semiconductor region is consequently controlled.

8. The semiconductor element of claim 7 , further comprising a pair of fourth field-control electrodes separated from the third field-control electrodes, respectively, along the transfer direction, and arranged adjacently to edge sides of the third field-control electrodes on the sides opposite to the second field-control electrodes, respectively, and laminated via the insulating film on the semiconductor region, so as to sandwich the charge-transfer path in between, in the planar pattern, along the direction orthogonal to the transfer direction,
wherein the field-control voltages, which differ from each other, are applied to the third and fourth field-control electrodes, and the movement of the signal charges transferring in the semiconductor region is consequently controlled.

9. A solid-state imaging device in which a plurality of unit elements are deployed, the unit element comprising:
a charge-transfer path defined in a semiconductor region, configured to transfer signal charges;
a pair of first field-control electrodes laminated via an insulating film on the semiconductor region so as to sandwich the charge-transfer path in between, in a planar pattern, along a direction orthogonal to a transfer direction of the signal charges, and
a pair of second field-control electrodes arranged separately from and adjacently to the first field-control electrodes, respectively, along the transfer direction, and laminated via the insulating film on the semiconductor region, so as to sandwich the charge-transfer path in between, in the planar pattern, along the direction orthogonal to the transfer direction,
wherein in each of the unit elements, field-control voltages, which differ from each other, are applied to the first and second field-control electrodes, and a depleted potential in the charge-transfer path is changed, thereby controlling a movement of the signal charges transferring in the semiconductor region.

10. A solid-state imaging device including a plurality of unit columns being deployed, each of the unit columns comprising a plurality of unit structures periodically arrayed along a charge-transfer path, the unit structure comprising:
the charge-transfer path defined in a semiconductor region, configured to transfer signal charges;
a pair of first field-control electrodes laminated via an insulating film on the semiconductor region so as to sandwich the charge-transfer path in between, in a planar pattern, along a direction orthogonal to a transfer direction of the signal charges, and
a pair of second field-control electrodes arranged separately from and adjacently to the first field-control electrodes, respectively, along the transfer direction, and laminated via the insulating film on the semiconductor region, so as to sandwich the charge-transfer path in between, in the planar pattern, along the direction orthogonal to the transfer direction, and
wherein in each of the unit columns and in a periodical arrangement of the field-control electrodes, including the first and second field-control electrodes, field-control voltages differing from each other are applied to the field-control electrodes, respectively, and a depleted potential in the charge-transfer path is changed, thereby controlling a movement of the signal charges transferring in the semiconductor region.

11. A solid-state imaging device including a plurality of the unit columns being deployed, each of the unit columns comprising a plurality of unit structures periodically arrayed along a main charge-transfer path, the unit structure comprising:
the main charge-transfer path defined in a semiconductor region, configured to transfer signal charges;
a pair of first field-control electrodes laminated via an insulating film on the semiconductor region so as to sandwich the charge

Assignees

• Univ Shizuoka Nat Univ Corp

Inventors

• Kawahito Shoji

Classifications

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N25/71

  Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors · CPC title

• H04N25/70

  SSIS architectures; Circuits associated therewith · CPC title

• H10F39/153

  Two-dimensional or three-dimensional array CCD image sensors · CPC title

• H10F39/8037

  the integrated elements comprising a transistor · CPC title