System and method for detecting a fundamental frequency of an electric power system

Patent metadata

Field	Value
Publication number	US-9696355-B2
Application number	US-201414502242-A
Country	US
Kind code	B2
Filing date	Sep 30, 2014
Priority date	Apr 29, 2011
Publication date	Jul 4, 2017
Grant date	Jul 4, 2017

Abstract

A system and method to detect the fundamental frequency of an electric input signal using a feedback control loop including a phase error detector, a loop controller, and a digitally controlled oscillator. The frequency detector may detect the fundamental frequency of an electric input signal and produce an output signal representing the fundamental frequency of the electric input signal. The frequency detector may further include a filter that may be coupled to the frequency detector output signal in order to remove spurious tones or noise from the output signal.

First claim

I claim:

1. A fundamental frequency detector system, comprising:
a phase error detector having inputs for an externally supplied input signal and a local reference input signal, and an output for a signal representing a comparison between them;
a loop controller having an input coupled to the phase error detector output and an output for a control word representing an estimated fundamental frequency of the externally supplied input signal;
a digitally controlled oscillator having an input coupled to the output of the loop controller and an output for the local reference input signal;
wherein the output of the loop controller is the output of the frequency detector system.

2. The fundamental frequency detector system of claim 1 , further comprising a programmable filter having an input coupled to the output of the loop controller and an output for a filtered signal.

3. The fundamental frequency detector system of claim 1 , further comprising a controller having a first output for an initialization signal representing an approximation of an expected fundamental frequency of the externally supplied input signal, a second output for a select signal, and a third output for a reset signal.

4. The fundamental frequency detector system of claim 3 , the loop controller further comprising an input for the reset signal.

5. The fundamental frequency detector system of claim 3 , further comprising a multiplexer having a first input coupled to the loop controller output signal, a second input coupled to the initialization signal, a third input coupled to the controller select signal, and an output coupled to the digitally controlled oscillator.

6. The fundamental frequency detector system of claim 3 , the controller further comprising an input coupled to the loop controller output.

7. The fundamental frequency detector system of claim 1 , the loop controller further comprising a multiplier having an input coupled to the phase error detector output, a proportional gain value, and a multiplier output for a signal representing a multiplication of the phase error comparison by the proportional gain value and an output for a signal representing a running average of successive phase error multiplications.

8. The fundamental frequency detector system of claim 1 , the loop controller further comprising an integrator having an input coupled to the phase error detector output, a gain value, and an output for a signal representing an integration of the phase error comparison multiplied by the gain value; and a summation module having an input coupled to the integrator output and an output for a signal representing a sum of successive phase error integrations.

9. The fundamental frequency detector system of claim 1 , the loop controller further comprising a derivative calculator having an input coupled to the phase error detector output, a gain value, and a output for a signal representing a derivative of the phase error comparison multiplied by the derivative gain value; and a summation module having an input coupled to the derivative calculator output and an output for a signal representing a sum of successive phase error derivative calculations.

10. A method for operating a fundamental frequency detector system, the method comprising:
receiving, at a phase error detector, a local reference input signal from a digitally controlled oscillator and an externally supplied input signal;
determining, using the phase error detector, an error signal representing a difference between phases of the local reference input signal and the externally supplied input signal;
estimating a fundamental frequency of the externally supplied input signal based at least in part on the error signal to obtain an estimated fundamental frequency;
adjusting a frequency of the local reference input signal using the digitally controlled oscillator based at least in part on the estimated fundamental frequency to reduce the difference between phases of the local reference input signal and the externally supplied input signal; and
outputting a frequency detector output signal, the frequency detector output signal generated based at least in part on the estimated fundamental frequency.

11. The method of claim 10 , wherein outputting the frequency detector output signal comprises filtering the frequency detector output signal with a programmable filter.

12. The method of claim 10 , further comprising:
generating, at a controller, an initialization signal having a frequency approximating an expected fundamental frequency of the externally supplied input signal;
setting the frequency of the local reference input signal using the digitally controlled oscillator to the frequency of the initialization signal in response to a controller select signal from the controller.

13. The method of claim 12 , further comprising:
resetting the frequency detector output signal.

14. The method of claim 12 , wherein setting the frequency of the local reference input signal comprises:
coupling, with a multiplexer, the initialization signal to the digitally controlled oscillator to control the frequency of the local reference input signal in response to the controller select signal.

15. The method of claim 10 , further comprising:
multiplying the error signal with a proportional gain value,
wherein estimating the fundamental frequency of the externally supplied input signal comprises determining a running average of successive error signals multiplied with the proportional gain value.

Assignees

• Analog Devices Inc

Inventors

• Antonesei Gabriel

Classifications

• G01R23/12 Primary

  by converting frequency into phase shift · CPC title

• G01R23/02 Primary

  Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage · CPC title

• G01R25/00

  Arrangements for measuring phase angle between a voltage and a current or between voltages or currents · CPC title

• G01R23/14

  by heterodyning; by beat-frequency comparison · CPC title

• H03L7/093

  using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence) · CPC title