III-V semiconductor device with interfacial layer

US9691872B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9691872-B2
Application numberUS-201414341629-A
CountryUS
Kind codeB2
Filing dateJul 25, 2014
Priority dateJul 25, 2013
Publication dateJun 27, 2017
Grant dateJun 27, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A semiconductor structure comprises a substrate including a III-V material, and a high-k interfacial layer overlaying the substrate. The interfacial layer includes a rare earth aluminate. The present disclosure also relates to an n-type FET device comprising the same, and a method for manufacturing the same.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor structure comprising: a substrate comprising a III-V material; and a high-k interfacial layer overlaying the substrate, wherein the interfacial layer comprises a rare earth aluminate, and wherein the high-k interfacial layer has a top surface facing away from the substrate and a bottom surface facing toward the substrate, and wherein an aluminium content at the top surface is higher than at the bottom surface. 2. The semiconductor structure of claim 1 , further comprising a high-k dielectric layer overlying the interfacial layer. 3. The semiconductor structure of claim 2 , wherein an equivalent oxide thickness of the stack of the high-k interfacial layer and the high-k dielectric layer is below 1 nm. 4. The semiconductor structure of claim 3 , wherein the high-k interfacial layer comprises Gd x Al y O 3 , and wherein x is at most 1.0. 5. The semiconductor structure of claim 3 , wherein the high-k interfacial layer comprises Sc x Al y O 3 , and wherein y is at least 0.5. 6. The semiconductor structure of claim 2 , wherein the high-k dielectric layer includes one or more of HfO 2 , TiO 2 , or ZnO 2 . 7. The semiconductor structure of claim 2 , wherein the thickness of the high-k dielectric layer is from 0.5 to 2 nm. 8. The semiconductor structure of claim 2 , wherein a leakage current below 0.01 A/cm 2 is achieved at 1V. 9. The semiconductor structure of claim 1 , wherein the rare earth aluminate includes one or more of Gd x Al y O 3 , Sc x Al y O 3 , or La x Al y O 3 , wherein x is from 0.4 to 1.6, and wherein x+y=2. 10. The semiconductor structure of claim 9 , wherein x is from 0.4 to 1.5, and wherein x+y=2. 11. The semiconductor structure of claim 10 , wherein x is from 0.4 to 1.4, and wherein x+y=2. 12. The semiconductor structure of claim 1 , wherein the III-V material includes one or more of InP, In z Ga 1-z As, or Al z Ga 1-z As, and wherein z is from 0 to 1. 13. The semiconductor structure of claim 1 , wherein the thickness of the high-k interfacial layer is from 0.5 to 2 nm. 14. The semiconductor structure of claim 1 , wherein a sulphur-comprising compound is present at the interface between the substrate and the high-k interfacial layer. 15. An n-type FET device comprising a semiconductor structure according to claim 1 . 16. A method for manufacturing a semiconductor structure according to claim 1 comprising: providing a substrate comprising a III-V material; and depositing a high-k interfacial layer overlaying the substrate, wherein the interfacial layer comprises a rare earth aluminate, wherein the high-k interfacial layer has a top surface facing away from the substrate and a bottom surface facing toward the substrate, and wherein an aluminium content at the top surface is higher than at the bottom surface. 17. The semiconductor structure of claim 1 , wherein an interface between the substrate and the high-k interfacial layer has an interface defect density between 5*10 10 to 5*10 12 defects/cm 2 when measured at at least one energy level within a bandgap of the III-V material.

Assignees

Inventors

Classifications

  • the material containing aluminium, e.g. Al2O3 · CPC title

  • the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides · CPC title

  • the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium · CPC title

  • the insulator being formed after the semiconductor body, the semiconductor being a Group III-V material · CPC title

  • being Group III-V materials, e.g. GaAs · CPC title

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What does patent US9691872B2 cover?
A semiconductor structure comprises a substrate including a III-V material, and a high-k interfacial layer overlaying the substrate. The interfacial layer includes a rare earth aluminate. The present disclosure also relates to an n-type FET device comprising the same, and a method for manufacturing the same.
Who is the assignee on this patent?
Imec Vzw, Univ Leuven Kath
What technology area does this patent fall under?
Primary CPC classification H01L29/513. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 27 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).