Integrated circuit device including through-silicon via structure and decoupling capacitor and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9691684-B2
Application number	US-201414327558-A
Country	US
Kind code	B2
Filing date	Jul 9, 2014
Priority date	Jul 25, 2013
Publication date	Jun 27, 2017
Grant date	Jun 27, 2017

Abstract

An integrated circuit device is provided which includes a through-silicon via (TSV) structure and one or more decoupling capacitors, along with a method of manufacturing the same. The integrated circuit device may include a semiconductor structure including a semiconductor substrate, a TSV structure passing through the semiconductor substrate, and a decoupling capacitor formed in the semiconductor substrate and connected to the TSV structure. The TSV structure and the one or more decoupling capacitors may be substantially simultaneously formed. A plurality of decoupling capacitors may be disposed within a keep out zone (KOZ) of the TSV structure. The plurality of decoupling capacitors may have the same or different widths and/or depths. An isopotential conductive layer may be formed to reduce or eliminate a potential difference between different parts of the TSV structure.

First claim

What is claimed is:

1. An integrated circuit device comprising:
a semiconductor structure comprising a semiconductor substrate;
a through-silicon via (TSV) structure passing through the semiconductor substrate;
a capacitor formed in the semiconductor substrate and electrically connected to the TSV structure; and
a first conductive layer and a second conductive layer,
wherein the TSV structure comprises:
a conductive plug;
a first conductive barrier layer spaced apart from the conductive plug and surrounding the conductive plug; and
a first insulating thin film disposed between the conductive plug and the first conductive barrier layer,

wherein the capacitor comprises:
a first electrode formed of the same material as a first material of the first conductive barrier layer;
a second electrode spaced apart from the first electrode and formed of the same material as a second material of at least a part of the conductive plug; and
a second insulating thin film disposed between the first electrode and the second electrode and formed of the same material as a third material of the first insulating thin film, and

wherein the first conductive layer is electrically connected to the conductive plug and the first conductive barrier layer on a first side of the TSV structure and the second conductive layer is electrically connected to the conductive plug and the first conductive barrier layer on a second side of the TSV structure opposite to the first side, and
wherein the capacitor does not pass through the semiconductor substrate.

2. The integrated circuit device of claim 1 , wherein each of the first electrode and the second electrode comprises metal.

3. The integrated circuit device of claim 1 ,
wherein the conductive plug of the TSV structure comprises:
a metal plug passing through the semiconductor structure and surrounded by the first insulating thin film; and
a second conductive barrier layer surrounding an external side wall of the metal plug between the metal plug and the first insulating thin film.

4. The integrated circuit device of claim 3 , wherein the second electrode of the capacitor comprises the same material as that of the second conductive barrier layer.

5. The integrated circuit device of claim 3 , wherein the second electrode of the capacitor has a stack structure comprising a first conductive layer formed of the same material as the metal plug and a second conductive layer formed of the same material as the second conductive barrier layer.

6. The integrated circuit device of claim 1 ,
wherein the first conductive barrier layer and the first electrode comprise a first metal, and
wherein the conductive plug and the second electrode comprise a second metal different from the first metal.

7. The integrated circuit device of claim 1 , further comprising:
a via insulating layer disposed between the semiconductor substrate and the first conductive barrier layer such that the first conductive barrier layer of the TSV structure is spaced apart from the semiconductor substrate,
wherein the first electrode of the capacitor contacts the semiconductor substrate.

8. The integrated circuit device of claim 1 , wherein the semiconductor structure is a part of a logic chip, a memory chip, or an interposer.

9. An integrated circuit device comprising:
a package substrate comprising a connection terminal;
a semiconductor structure comprising a semiconductor substrate stacked on the package substrate;
a TSV structure passing through the semiconductor substrate of the semiconductor structure;
at least one capacitor formed in the semiconductor substrate of the semiconductor structure and electrically connected to the TSV structure; and
a first conductive layer and a second conductive layer facing each other with the TSV structure interposed therebetween,
wherein the TSV structure comprises:
a conductive plug connected to the connection terminal;
a first conductive barrier layer spaced apart from the conductive plug and surrounding the conductive plug; and
a first insulating thin film disposed between the conductive plug and the first conductive barrier layer,

wherein the at least one capacitor comprises:
a first electrode formed of the same material as a first material of the first conductive barrier layer;
a second electrode spaced apart from the first electrode and formed of the same material as a second material of at least a part of the conductive plug; and
a second insulating thin film disposed between the first electrode and the second electrode and formed of the same material as a third material of the first insulating thin film,

wherein the first conductive layer is electrically connected to the conductive plug and the first conductive barrier layer on a first side of the TSV structure and the second conductive layer is electrically connected to the conductive plug and the first conductive barrier layer on a second side of the TSV structure opposite to the first side, and
wherein the at least one capacitor does not pass through the semiconductor substrate.

10. The integrated circuit device of claim 9 , wherein the at least one capacitor comprises a plurality of capacitors that are connected to each other in parallel.

11. The integrated circuit device of claim 10 , wherein the plurality of capacitors are formed in a plurality of trenches formed in the semiconductor substrate,
wherein the plurality of trenches are spaced apart from each other.

12. The integrated circuit device of claim 10 , wherein the plurality of capacitors are formed in a plurality of trenches formed in the semiconductor substrate,
wherein the plurality of trenches comprise at least two trenches with different depths.

13. The integrated circuit device of claim 1 , wherein the first conductive layer faces the second conductive layer with the TSV structure interposed therebetween.

14. The integrated circuit device of claim 1 , wherein the first insulating thin film comprises:
a first end contacting the first conductive layer; and
a second end opposite the first end, the second end contacting the second conductive layer.

15. The integrated circuit device of claim 1 , wherein the first insulating thin film has a cylindrical structure surrounding the conductive plug.

16. The integrated circuit device of claim 1 , further comprising a backside insulating layer covering a back surface of the semiconductor substrate on a side of the semiconductor substrate opposite to the first side of the TSV structure,
wherein the backside insulating layer surrounds a portion of the TSV structure, and
wherein the first conductive barrier layer passes through the backside insulating layer to contact the second conductive layer.

17. The integrated circuit device of claim 9 , wherein the first insulating thin film comprises:
a first end contacting the first conductive layer; and
a second end opposite the first end, the second end contacting the second conductive layer.

18. The integrated circuit device of claim 9 , wherein the first insulating thin film has a cylindrical structure surrounding the conductive plug.

19. The integrated circuit device of claim 9 , further comprising a backside insulating layer covering a back surface of the semiconductor substrate on a side of the semiconductor substrate opposite to the first side of the TSV structure,
wherein the backside insulating layer surrounds a portion of the TSV structure, and
wherein the first conductive barrier layer passes through the backside insulating layer to contact

Assignees

• Park Jae-Hwa
• Kang Sung-Hee
• Moon Kwang-Jin
• Park Byung-Lyul
• Bang Suk-Chul
• Samsung Electronics Co Ltd

Inventors

• Park Jae-Hwa
• Kang Sung-Hee
• Moon Kwang-Jin
• Park Byung-Lyul
• Bang Suk-Chul

Classifications

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10W20/0249

  wherein the through-semiconductor via protrudes from backsides of the chips, wafers or substrates during the manufacture · CPC title

• H10W20/2134

  TSVs extending from the semiconductor wafer into back-end-of-line layers · CPC title

• H10W20/2128

  Coaxial through-semiconductor vias · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title