Semiconductor device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9685565-B2
Application number	US-201414470719-A
Country	US
Kind code	B2
Filing date	Aug 27, 2014
Priority date	Sep 5, 2013
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

The performance of a semiconductor device having a memory element is improved. An insulating film, which is a gate insulating film for a memory element, is formed on a semiconductor substrate, and a gate electrode for the memory element is formed on the insulating film. The insulating film has a first insulating film, a second insulating film thereon, and a third insulating film thereon. The second insulating film is a high-dielectric constant insulator film having a charge accumulating function and contains hafnium, silicon, and oxygen. Each of the first insulating film and the third insulating film has a band gap larger than the band gap of the second insulating film.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate;
a gate insulating film for a memory element formed on the semiconductor substrate; and
a gate electrode for the memory element formed on the gate insulating film,
wherein the gate insulating film has a first insulating film, a second insulating film on the first insulating film, and a third insulating film on the second insulating film,
the second insulating film has a charge accumulating function and contains hafnium, silicon, and oxygen,
a dielectric constant of the second insulating film is higher than that of silicon nitride,
each of the first insulating film and the third insulating film has a band gap larger than a band gap of the second insulating film, and
wherein:
the second insulating film includes a hafnium oxide of orthorhombic crystal structure,
when the atomic ratio of hafnium and silicon in the second insulating film is x:y, the condition 0.79≦x/(x+y)≦0.87 is satisfied, and
in said second insulating film, a charge trapping density is from about 5.0×10 −6 C/cm 2 to about 5.5×1.0 −6 C/cm 2 .

2. The semiconductor device according to claim 1 ,
wherein each of the first insulating film and the third insulating film is a high-dielectric constant film.

3. The semiconductor device according to claim 2 ,
wherein each of the first insulating film and the third insulating film is an aluminum oxide film.

4. The semiconductor device according to claim 3 , further comprising
an interface layer formed at an interface between the gate insulating film and the semiconductor substrate and formed of a silicon oxide or a silicon oxynitride.

5. The semiconductor device according to claim 1 , wherein the second insulating film is a hafnium silicate film.

6. The semiconductor device according to claim 1 , further comprising
a semiconductor region for a source or a drain for the memory element, the semiconductor region being formed in the semiconductor substrate.

7. The semiconductor device of claim 1 , wherein said second insulating film has a thickness of from about 10 nm to about 15 nm.

8. The semiconductor device of claim 1 , wherein said second insulating film has a thickness of about 10 nm.

Assignees

• Renesas Electronics Corp

Inventors

• Mizutani Masaharu
• Inoue Masao
• Umeda Hiroshi
• Kadoshima Masaru

Classifications

• H10P14/69391

  the material containing aluminium, e.g. Al2O3 · CPC title

• H10P14/6546

  to change the surface groups of the insulating materials · CPC title

• H10P14/6516

  of treatments performed after formation of the materials · CPC title

• H10P14/693

  the material containing hafnium, e.g. HfSiOx or HfSiON · CPC title

• H10D64/0135

  by deposition of a layer, e.g. metal, metal compound or polysilicon, followed by transformation thereof into the insulator · CPC title