Selective nanoscale growth of lattice mismatched materials

Patent metadata

Field	Value
Publication number	US-9685324-B2
Application number	US-201514610254-A
Country	US
Kind code	B2
Filing date	Jan 30, 2015
Priority date	Sep 14, 2010
Publication date	Jun 20, 2017
Grant date	Jun 20, 2017

Abstract

Exemplary embodiments provide materials and methods of forming high-quality semiconductor devices using lattice-mismatched materials. In one embodiment, a composite film including one or more substantially-single-particle-thick nanoparticle layers can be deposited over a substrate as a nanoscale selective growth mask for epitaxially growing lattice-mismatched materials over the substrate.

First claim

What is claimed is:

1. A method of forming a semiconductor device comprising:
providing a substrate;
depositing a plurality of nanoparticles to form a composite film comprising one or more substantially-single-particle-thick nanoparticle layers over the substrate, wherein the composite film comprises a plurality of inter-particle spaces, and wherein the one or more substantially-single-particle-thick nanoparticle layers comprise a plurality of nanoparticles having an average particle size ranging from about 5 nm to about 150 nm in diameter;
epitaxially growing a material over the substrate through the plurality of inter-particle spaces of the composite film, wherein the material has a lattice mismatch with the substrate; and
continuing epitaxial growth of the material to laterally coalesce over a top surface of the composite film,
forming a buffer layer between the composite film and the substrate, wherein the substrate comprises a Group IV substrate, and
epitaxially growing the material on the buffer layer over the substrate,
wherein the one or more substantially-single-particle-thick nanoparticle layers contacts the buffer layer,
wherein the one or more substantially-single-particle-thick nanoparticle layers is sterically-limited such that each of the plurality of nanoparticles is contacted by multiple additional ones of the plurality of nanoparticles, and
wherein the inter-particle spaces are smaller than an average nanoparticle diameter of the plurality of nanoparticles.

2. The method of claim 1 , wherein the substantially-single-particle-thick nanoparticle layer consists essentially of a plurality of nanoparticles having an average particle size ranging from about 80 nm to about 150 nm in diameter.

3. The method of claim 1 , wherein the substantially-single-particle-thick nanoparticle layer consists essentially of a plurality of nanoparticles having an average particle size ranging from about 5 nm to about 80 nm in diameter.

4. The method of claim 1 , wherein the substantially-single-particle-thick nanoparticle layer comprises an open area, and wherein a top down fraction of the open area is about

(

1
-

π

2
⁢

3

)

or from about 0.09 to about 0.3, and wherein an aspect ratio of the nanoparticle diameter to a lateral dimension of the open area is

[

2

(

3

-
1

)

]

⁢
or
⁢

⁢

2.73
.

5. The method of claim 1 , wherein the substantially-single-particle-thick nanoparticle layer is formed from one or more of silica, silicon nitride, alumina, and/or sapphire.

6. A method of forming a semiconductor device comprising:
providing a Group IV substrate
forming a buffer layer on the Group IV substrate;
depositing a plurality of nanoparticles to form a composite film comprising one or more substantially-single-particle-thick nanoparticle layers on the buffer layer, wherein the composite film comprises a plurality of inter-particle spaces that expose portions of the buffer layer, and wherein the substantially-single-particle-thick nanoparticle layer comprises a plurality of nanoparticles having an average particle size ranging from about 5 nm to about 150 nm in diameter;
epitaxially growing a material on the exposed portions of the buffer layer through the plurality of inter-particle spaces of the composite film, wherein the material has a lattice mismatch with the substrate; and
continuing epitaxial growth of the material to laterally coalesce over a top surface of the composite film,
wherein the depositing of the plurality of nanoparticles comprises depositing a plurality of large nanoparticles and depositing a plurality of small nanoparticles in consecutive depositions, wherein an average particle size of the large nanoparticles is greater than an average particle size of the small nanoparticles.

7. The method of claim 6 , wherein the Group IV substrate comprises Si or Ge.

8. The method of claim 6 , further comprising forming one or more additional epitaxial layers on the laterally coalesced material to form an active region for the semiconductor device.

9. The method of claim 6 , wherein the Group IV substrate comprises a (001)-oriented Si substrate or a 2°-off Si(001) substrate.

10. The method of claim 6 , wherein the buffer layer is formed having a thickness ranging from about 10 nm to about 1 micrometer.

11. The method of claim 6 , wherein each of the buffer layer and the epitaxially growing material comprises GaAs, InP, GaSb, InSb, InAs, GaN, or InN.

12. The method of claim 6 , wherein each of the buffer layer and the epitaxially growing material is GaAs, wherein each of the one or more substantially-single-particle-thick nanoparticle layers has an aspect ratio of about 2 or an open area ratio of less than about 0.3.

13. The method of claim 6 , wherein the plurality of small nanoparticles have an average particle size ranging from about 6 nm to about 20 nm disposed on the first layer.

14. The method of claim 13 , wherein the nanoparticles are applied as a colloidal solution thereby forming a hexagonal, square, or pentagonal complex arrangement.

Assignees

• Lee Seung-Chang
• Brueck Steven R J
• Stc Unm

Inventors

• Lee Seung-Chang
• Brueck Steven R J

Classifications

• H10P14/3421

  Arsenides · CPC title

• H10P14/3414

  being group IIIA-VIA materials · CPC title

• H10P14/3251

  consisting of three or more layers · CPC title

• H10P14/3216

  Nitrides · CPC title

• H10P14/3214

  being Group IIIA-VA semiconductors · CPC title