Necked interconnect fuse structure for integrated circuits

Patent metadata

Field	Value
Publication number	US-9679845-B2
Application number	US-201415124867-A
Country	US
Kind code	B2
Filing date	May 8, 2014
Priority date	May 8, 2014
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

Interconnect fuse structures including a fuse with a necked line segment, as well as methods of fabricating such structures. A current driven by an applied fuse programming voltage may open necked fuse segments to affect operation of an IC. In embodiments, the fuse structure includes a pair of neighboring interconnect lines equidistant from a center interconnect line. In further embodiments, the center interconnect line, and at least one of the neighboring interconnect lines, include line segments of lateral widths that differ by a same, and complementary amount. In further embodiments, the center interconnect line is interconnected at opposite ends of a necked line segment. In further embodiments, the necked line segment is fabricated with pitch-reducing spacer-based patterning process.

First claim

What is claimed is:

1. An integrated circuit (IC) fuse structure, comprising:
an interconnect fuse line disposed over a substrate, the fuse line comprising a nominal fuse segment abutted to a necked fuse segment, wherein the nominal fuse segment has a nominal lateral width, and the necked fuse segment has a necked lateral width that is smaller than the nominal lateral width;
a pair of interconnect lines disposed over the substrate and coplanar with the fuse line, and each of the interconnect lines spaced equidistant from opposite edges of both the nominal fuse segment and the necked fuse segment; and
a pair of electrical connections to the fuse line, the pair of connections comprising a first connection to the nominal fuse segment, and a second connection spaced apart from the first connection by at least the necked fuse segment.

2. The IC fuse structure of claim 1 , wherein:
a first of the interconnect lines comprises a wider line segment abutted between two nominal line end segments having the nominal lateral width;
the wider line segment has a wider lateral width that is larger than the nominal lateral width;
the wider line segment has a lateral length that is less than that of the necked fuse segment; and
the wider line segment is aligned along the length dimension to a center of the necked fuse segment.

3. The IC fuse structure of claim 2 , wherein:
the necked lateral width is narrower than the nominal lateral width by an amount substantially equal to the amount by which the wider lateral width is larger than the nominal lateral width; or
the first and second interconnect lines each comprise a wider line segment having a lateral width that is larger than the nominal lateral width by amounts that combine to substantially equal to the difference between the necked lateral width and the nominal lateral width.

4. The IC fuse structure of claim 2 , the necked lateral width is narrower than the nominal lateral width by an amount substantially equal to the amount by which the wider lateral width is larger than the nominal lateral width.

5. The IC fuse structure of claim 2 , wherein:
the amount by which the wider lateral width is larger than the nominal lateral width is at least equal to a spacing between the nominal fuse segment and the two nominal line end segments.

6. The IC fuse structure of claim 1 , wherein:
the fuse line comprises the nominal fuse segment abutted to the necked fuse segment on a first end, and a second nominal fuse segment abutted to the necked fuse segment on a second end; and
the pair of electrical connections intersect the nominal fuse segments.

7. The IC fuse structure of claim 6 , wherein:
the pair of electrical connections include a pair of conductive vias extending in a third dimension, a first via having a via width that is greater than the necked fuse segment width.

8. The IC fuse structure of claim 1 , wherein a second of the interconnect lines is of the nominal lateral width along a line length that is adjacent to both the nominal and necked fuse segments.

9. A method of fabricating an integrated circuit (IC) fuse structure, the method comprising:
forming over a substrate two mandrel lines having outside edges that are laterally spaced apart by at least a first distance, and having inside edges that are laterally spaced apart by a nominal space along a first segment and by a narrower space along a second segment;
converting the two mandrel lines, with a pitch-reducing spacer-based patterning process, into three adjacent interconnect lines disposed within the first distance and spaced apart from each other by two equal distances, wherein the three lines include a center interconnect line that further comprises a nominal line segment of a nominal lateral width and a necked line segment of a narrower width; and
interconnecting the center interconnect line with electrical connections that are spaced apart by at least the necked line segment.

10. The method of claim 9 , wherein:
forming the mandrel lines further comprises:
patterning a pair of adjacent mandrel lines in a first material disposed over a substrate to have first mandrel line segments laterally spaced apart by a narrower space and second mandrel line segments laterally spaced apart by a nominal space that is larger than the narrower space;

converting the two mandrel lines, with a pitch-reducing spacer-based patterning process, into three adjacent interconnect lines further comprises:
forming a spacer along edges of the mandrel lines, the spacer including first spacer segments disposed within the nominal space and second spacer segments disposed within the narrower space, with the spacer segments having a lateral width that is less than one half the narrower space;
removing the pair of mandrel lines selectively from the pair of spacers; and
forming an interconnect fuse line between the spacers, the fuse line having a nominal fuse segment filling a space between the first spacer segments and abutted to a necked fuse segment filling a space between the second spacer segments.

11. The method of claim 10 , further comprising forming a pair of interconnect lines concurrently with forming the fuse line by backfilling with a metal the regions from which the pair of mandrel lines were removed.

12. The method of claim 11 , wherein:
forming the fuse line further comprises backfilling the nominal and narrower spaces between the spacer with the metal; and
the narrower space is formed to a lateral length that is larger than a lateral length of the first mandrel line segments.

13. The method of claim 10 , wherein forming the pair of mandrels further comprises:
patterning a mask material into a first mandrel comprising a nominal mandrel segment of nominal lateral width abutted to a wider mandrel segment having a wider lateral width than the nominal lateral width by an amount substantially equal to the difference in lateral width of the nominal space and narrower space.

14. The method of claim 13 , wherein forming the pair of mandrels further comprises:
patterning a mask material into a first mandrel comprising a nominal mandrel segment of nominal lateral width abutted to a wider mandrel segment having a wider lateral width than the nominal lateral width by an amount substantially equal to the lateral width of the spacer.

15. The method of claim 10 , wherein interconnecting the fuse line with a first electrical connection to the nominal fuse segment further comprises:
forming a via that intersects the nominal fuse segment, the via having a lateral via width that is larger than the narrower space; and
filling the via with a metal.

16. The method of claim 10 , wherein:
forming the spacer further comprises:
depositing a dielectric material to a first thickness with a conformal deposition process; and
etching through the first thickness of dielectric material with an anisotropic etching process.

17. The method of claim 10 , wherein patterning the pair of adjacent mandrel lines in a first material further comprises:
printing an array of mandrel lines into a first photoresist, the mandrel lines within the array having the nominal space; and
printing a blocking pattern into a second photoresist applied over the first photoresist to form a field portion within the mandrel line array adjacent to at least one of the pair of mandrel lines along a length at least equal to the second spacer segments.

18. The method of claim 10 , wherein:
the pair of adjacent mandrel lines is anisotropically patterned into a first dielectric material;
forming t

Assignees

• Intel Corp

Inventors

• Chen Zhanping
• Yeoh Andrew W
• Jeong Seongtae
• Bhattacharya Uddalak
• Wallace Charles H

Classifications

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title

• H10W20/493 Primary

  Fuses, i.e. interconnections changeable from conductive to non-conductive · CPC title