Manufacturing a damascene thin-film resistor

Patent metadata

Field	Value
Publication number	US-9679844-B2
Application number	US-201615184748-A
Country	US
Kind code	B2
Filing date	Jun 16, 2016
Priority date	Jun 18, 2015
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

In some embodiments of the present disclosure, a method for manufacturing a thin film resistor after completing a copper chemical mechanical polishing (CMP) process on a copper process module may include: depositing a dielectric barrier layer across at least two structures; depositing a second dielectric layer atop the dielectric barrier as a hard mask; patterning a trench using photo lithography; etching the trench through the hard mask and stopping in or on the dielectric barrier; removing any remaining photoresist from the photo lithography process; etching the trench through the dielectric barrier thereby exposing a copper surface for each of the at least two copper structures; and depositing thin-film resistor material into the trench and bridging across the resulting at least two exposed copper surfaces.

First claim

The invention claimed is:

1. A method for manufacturing a thin film resistor (TFR) after completing a Copper chemical mechanical polishing (CMP) process on a copper process module, the method comprising:
depositing a dielectric barrier layer across at least two copper structures;
depositing a second dielectric layer atop the dielectric barrier as a hard mask;
patterning a trench into a photoresist layer using photo lithography;
etching the trench through the hard mask and stopping in or on the dielectric barrier;
removing any remaining photoresist from the photo lithography process;
etching the trench through the dielectric barrier thereby exposing a copper surface for each of the at least two copper structures; and
depositing thin-film resistor material into the trench and bridging across the resulting at least two exposed copper surfaces;
wherein the top surface of the thin-film resistor material is aligned with the top surface of the at least two copper structures.

2. A method for manufacturing a thin film resistor as recited in claim 1 , further comprising the step of capping the thin-film with a dielectric film.

3. A method for manufacturing a thin film resistor as recited in claim 2 , wherein the dielectric film is silicon dioxide.

4. A method for manufacturing a thin film resistor as recited in claim 1 , wherein a cleaning step is performed after the TFR trench etching.

5. A method for manufacturing a thin film resistor as recited in claim 4 , wherein the cleaning step is a diluted HF clean configured to remove etch residue from the surface of a wafer.

6. A method for manufacturing a thin film resistor as recited in claim 1 , wherein the thin-film material is TaN, SiCr, or SiCCr.

7. A method for manufacturing a thin film resistor as recited in claim 1 , wherein the thin-film material is selected from the group consisting of TaNx, CrSi, NiCr, TiNx, SiCr, SiCCr, Ta, Cr, Ti, W, and Mo.

8. A method for manufacturing a thin film resistor as recited in claim 1 , further comprising polishing off any protruding materials outside TFR trenches, including TFR dielectric cap, TFR material, and/or some or all of the remaining hard mask with a second CMP process after the thin-film resistor material has been deposited into the trench.

9. A method for manufacturing a thin film resistor as recited in claim 8 , further comprising continuing a copper damascene process after the completion of the second CMP to connect the at least two separated copper structures to other structures on a wafer using vias.

Assignees

• Microchip Tech Inc

Inventors

• Leng Yaojian
• Sato Justin Hiroki

Classifications

• H10W20/4421 Primary

  the principal metal being copper · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title

• H10W20/037 Primary

  the barrier, adhesion or liner layers being on top of a main fill metal · CPC title

• H10W20/498 Primary

  Resistive arrangements or effects of, or between, wiring layers · CPC title

• H01L23/5228 Primary

  Electricity · mapped topic