Multi-layer ceramic capacitor and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9679698-B2
Application number	US-201214389296-A
Country	US
Kind code	B2
Filing date	Nov 13, 2012
Priority date	Mar 30, 2012
Publication date	Jun 13, 2017
Grant date	Jun 13, 2017

Abstract

A multi-layer ceramic capacitor has a structure where the dispersion, nd, of average grain size of the dielectric grains constituting the dielectric layer (a value (D90/D10) obtained by dividing D90 which is a grain size including 90% cumulative abundance of grains by D10 which is a grain size including 10% cumulative abundance of grains) is smaller than 4.

First claim

The invention claimed is:

1. A multi-layer ceramic capacitor constituted by sintered dielectric layers and internal electrode layers alternately layered with one another, wherein dielectric grains constitute a sintered grain body which forms the sintered dielectric layers, and a dispersion, nd, of average grain size of the dielectric grains (a value (D90/D10) obtained by dividing D90 which is a grain size including 90% cumulative abundance of grains by D10 which is a grain size including 10% cumulative abundance of grains) is smaller than 4, said dielectric grains being sintered and grown to an average size greater than 300 nm but smaller than 1000 nm.

2. A multi-layer ceramic capacitor according to claim 1 , wherein the dielectric layer does not contain Mg.

3. A multi-layer ceramic capacitor according to claim 2 , wherein an average size of the dielectric grains is greater than 300 nm but smaller than 1000 nm.

4. A multi-layer ceramic capacitor according to claim 1 , wherein the dielectric layer contains 0.03 mol or less of Mg per 100 mol of BaTiO 3 .

5. A multi-layer ceramic capacitor according to claim 4 , wherein the dielectric layer contains 0.01 mol or more but 0.03 mol or less of Mg per 100 mol of BaTiO 3 .

6. A multi-layer ceramic capacitor according to claim 5 , wherein an average size of the dielectric grains is greater than 300 nm but smaller than 1000 nm.

7. A multi-layer ceramic capacitor according to claim 4 , wherein an average size of the dielectric grains is greater than 300 nm but smaller than 1000 nm.

8. A multi-layer ceramic capacitor according to claim 1 , wherein the multi-layer ceramic capacitor has an accelerated life of 25 hours or longer as measured by an accelerated life test conducted under conditions of 150° C. and 8.5 V/μm.

9. A multi-layer ceramic capacitor according to claim 1 , wherein the multi-layer ceramic capacitor has a specific dielectric constant of 5000 or greater.

10. A method of manufacturing a multi-layer ceramic capacitor comprising:
a step to prepare a dielectric material powder whose average grain size is 200 nm or less, and
a step to sinter the dielectric material powder in such a way that a dispersion of average grain size nd (grain size D90 equivalent to 90% cumulative abundance divided by grain size D10 equivalent to 10% cumulative abundance (D90/D10)) of dielectric grains constituting a dielectric layer becomes smaller than 4, and an average size of the dielectric grains becomes greater than 300 nm but smaller than 1000 nm.

11. A method of manufacturing multi-layer ceramic capacitor according to claim 10 , wherein an average grain size of the dielectric material powder is 80 nm or greater but 200 nm or smaller.

Assignees

• Taiyo Yuden Kk

Inventors

• Morita Koichiro
• Shimura Tetsuo

Classifications

• C04B2235/784

  Monomodal · CPC title

• C04B2235/3206

  Magnesium oxides or oxide-forming salts thereof · CPC title

• C04B2235/5454

  nanometer sized, i.e. below 100 nm · CPC title

• H01G4/248

  the terminals embracing or surrounding the capacitive element, e.g. caps (H01G4/252 takes precedence) · CPC title

• C04B2235/6584

  at an oxygen percentage below that of air · CPC title