Method for increasing pattern density in self-aligned patterning integration schemes

Patent metadata

Field	Value
Publication number	US-9673059-B2
Application number	US-201615009013-A
Country	US
Kind code	B2
Filing date	Jan 28, 2016
Priority date	Feb 2, 2015
Publication date	Jun 6, 2017
Grant date	Jun 6, 2017

Abstract

Provided is a method for increasing pattern density of a structure on a substrate using an integration scheme comprising: providing a substrate having a patterned layer comprising a first mandrel and an underlying layer; performing a first conformal spacer deposition creating a first conformal layer; performing a first spacer reactive ion etch (RIE) process on the first conformal layer, creating a first spacer pattern; performing a first mandrel pull process removing the first mandrel; performing a second conformal spacer deposition creating a second conformal layer; performing a second RIE process creating a second spacer pattern, the first spacer pattern acting as a second mandrel; performing a second mandrel pull process removing the first spacer pattern; and transferring the second spacer pattern into the underlying layer; where the integration targets include patterning uniformity, pulldown of structures, slimming of structures, and gouging of the underlying layer.

First claim

The invention claimed is:

1. A method for increasing pattern density of a structure on a substrate using an integration scheme, the integration scheme configured to meet integration targets, the method comprising:
providing a substrate having a patterned layer, the patterned layer comprising a first mandrel and an underlying layer;
performing a first conformal spacer deposition, the deposition creating a first conformal layer above the patterned layer;
performing a first spacer reactive ion etch (RIE) process on the first conformal layer, the RIE process creating a first spacer pattern;
performing a first mandrel pull process, the first mandrel pull process removing the first mandrel;
performing a second conformal spacer deposition, the deposition creating a second conformal layer;
performing a second RIE process on the second conformal layer, the RIE process creating a second spacer pattern, the first spacer pattern being used as a second mandrel;
performing a second mandrel pull process, the second mandrel pull process removing the first spacer pattern;
transferring the second spacer pattern into the underlying layer;
wherein the integration targets include patterning uniformity (uniformity), pulldown of structures (pulldown), slimming of structures (slimming), and gouging of the underlying layer (gouging), and
wherein the first conformal layer comprises silicon nitride and the second conformal layer comprises aluminum oxide.

2. The method of claim 1 further comprising:
controlling selected two or more integration operating variables in two or more steps involving deposition processes, RIE processes, pull processes, and pattern transfer process of the integration scheme.

3. The method of claim 2 wherein the first mandrel comprises silicon, the underlying layer comprises a TiO2 or Al2O3, or thin oxide atomic layer deposition material oxide.

4. The method of claim 3 wherein the first spacer RIE process is performed with a first spacer pulldown and a second spacer pulldown of less than 10 nm.

5. The method of claim 4 wherein the spacer RIE process uses a high density plasma with low plasma potential to limit pulldown due to ion impingement on corners of the first spacer pattern and the second spacer pattern.

6. The method of claim 5 wherein the spacer RIE process uses an inductively coupled plasma (ICP) source or a capacitively coupled plasma (CCP) source with pulsing capability.

7. The method of claim 6 wherein the first mandrel pull process is performed with a high density plasma source configured to yield a minimum critical dimension (CD) slimming of the first spacer pattern to 3 nm or less and configured to control gouging of the underlying layer in a range from 0.05 nm to 5.00 nm.

8. The method of claim 7 wherein the first mandrel pull process utilized a mixture of hydrogen bromide and oxygen or chlorine and helium, and wherein the second mandrel pull process utilized CH3F/O2/Ar, CH3F/H2/Ar or CH3F/H2/He.

9. The method of claim 1 wherein the uniformity is in a range of −5% to +5% of a mean critical dimension of the structure, the pulldown is in a range of 0.5 to 15.0 nm, slimming is in a range from 0.5 to 3.0 nm, and gouging is in a range from 0.05 to 5.00 nm.

10. The method of claim 9 wherein the second conformal layer comprises silicon nitride and the first mandrel pull process utilized a mixture of hydrogen bromide and oxygen or a mixture of chlorine and helium.

11. The method of claim 1 wherein the first mandrel pull process comprises an amorphous carbon layer, the underlying layer comprises TiO2 or TiN or Al2O3, or thin oxide atomic layer deposition material, and the second mandrel pull process utilized a CH3F/O2/Ar, CH3F/H2/Ar or CH3F/H2/He gas mixture.

12. A method for increasing pattern density of a structure on a substrate using an integration scheme, the integration scheme configured to meet integration targets, the method comprising:
providing a substrate in a processing chamber, the substrate having a patterned layer, the patterned layer comprising a mandrel and an underlying layer;
performing a first conformal spacer deposition using silicon nitride, the deposition creating a first conformal layer above the patterned layer;
performing a first spacer reactive ion etch (RIE) process on the first conformal layer, the RIE process creating a first spacer pattern;
performing a second conformal spacer deposition, the deposition creating a second conformal layer;
performing a second RIE process on the second conformal layer, the RIE process creating a second spacer pattern;
performing a first spacer pattern pull process, the first spacer pattern pull process removing the first spacer pattern; and
transferring a pattern into the underlying layer using two masks, the two masks comprising the mandrel and the second spacer pattern;
wherein the integration targets include patterning uniformity (uniformity), pulldown of structures (pulldown), slimming of structures (slimming), and gouging of the underlying layer (gouging), and
wherein the first mandrel comprises silicon.

13. The method of claim 12 further comprising:
controlling selected two or more integration operating variables in two or more steps involving deposition processes, RIE processes, pull processes, and pattern transfer process of the integration scheme.

14. The method of claim 12 wherein the underlying layer comprises a first layer of thin oxide and a second layer of titanium nitride, and the first conformal spacer deposition comprises silicon nitride.

15. The method of claim 14 wherein the second conformal spacer deposition comprises Al2O3, and the gases of the first RIE process comprise CH3F/O2/Ar or CH3/H2/Ar or CH3/H2/He.

16. The method of claim 12 wherein the uniformity is in the range of −5% to +5% of a mean critical dimension of the structure, the pulldown of a structure is in a range of 0.5 to 15.0 nm.

17. The method of claim 12 wherein slimming is in a range from 0.5 to 3.0 nm and gouging is in a range from 0.05 to 5.00 nm.

18. The method of claim 12 wherein the first conformal spacer deposition is Al2O3, the second conformal spacer deposition is TiO2, and the gases of the first RIE process comprise BCl3, CF4, Ar and the gases of the second RIE process comprise C4F8/O2 with a carrier gas that is Ar or He or C4F6/O2 with a carrier gas that is Ar or He.

19. The method of claim 12 wherein all manufacturing processes of the integration scheme are performed using the processing chamber.

Assignees

• Tokyo Electron Ltd

Inventors

• Raley Angelique
• Ko Akiteru

Classifications

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P50/287

  by chemical means · CPC title

• H10P50/285

  of materials not containing Si, e.g. PZT or Al2O3 · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/268

  of silicon-containing layers · CPC title